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參數(shù)資料
| 型號： | K4B1G1646C-ZCG9 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1Gb C-die DDR3 SDRAM Specification |
| 中文描述： | 1Gb的?芯片的DDR3 SDRAM規(guī)范 |
| 文件頁數(shù)： | 27/63頁 |
| 文件大小： | 1255K |
| 代理商： | K4B1G1646C-ZCG9 |
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Page 27 of 63
Rev. 1.0 June 2007
1Gb DDR3 SDRAM
K4B1G04(08/16)46C
Note :
1. The tolerance limits are specified after calibration with stable voltage and temperature. For the behavior of the tolerance limits if temperature or voltage
changes after calibration, see following section on voltage and temperature sensitivity
2. The tolerance limits are specified under the condition that VDDQ = VDD and that VSSQ = VSS
3. Pull-down and pull-up ODT resistors are recommended to be calibrated at 0.5XVDDQ. Other calibration schemes may be used to achieve the linearity
spec shown above, e.g. calibration at 0.2XVDDQ and 0.8XVDDQ.
4. Not a specification requirement, but a design guide line
5. Measurement definition for RTT:
Apply VIH(ac) to pin under test and measure current I(VIH(ac)), then apply VIL(ac) to pin under test and measure current I(VIL(ac)) perspectively
6. Measurement definition for VM and
VM : Measure voltage (VM) at test pin (midpoint) with no load
RTT =
VIH(ac) - VIL(ac)
I(VIH(ac)) - I(VIL(ac))
VM =
2 x VM
VDDQ
x 100
- 1
If temperature and/or voltage change after calibration, the tolerance limits widen according to table below
T = T - T(@calibration);
V = VDDQ - VDDQ (@calibration); VDD = VDDQ
[ Table 26 ] ODT Sensitivity Definition
[ Table 27 ] ODT Voltage and Temperature Sensitivity
These parameters may not be subject to production test. They are verified by design and characterization.
Min
Max
Units
RTT
0.9 - dR
TT
dT * |
T| - dR
TT
dV * |
V|
1.6 + dR
TT
dT * |
T| + dR
TT
dV * |
V|
RZQ/2,4,6,8,12
Min
Max
Units
dR
TT
dT
0
1.5
%/
°
C
dR
TT
dV
0
0.15
%/mV
9.8.2 ODT Temperature and Voltage sensitivity
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