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參數(shù)資料
| 型號： | K4C560838C-TCD3 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 256Mb Network-DRAM |
| 中文描述： | 256Mb的網(wǎng)絡(luò)內(nèi)存 |
| 文件頁數(shù)： | 38/42頁 |
| 文件大?。?/td> | 880K |
| 代理商： | K4C560838C-TCD3 |
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K4C5608/1638C 256Mb Network-DRAM
REV. 0.7 Aug. 2003
- 38 -
Functional Description (Continued)
Command Functions and Operations
K4C5608/1638C-TC are introduced the two consccutive command input method. Therefore, except for Power Down mode, each
operation mode decided by the combination of the first command and the second command from stand-by states of the bank to be
accessed.
Read Operation (1st command + 2nd command = RDA + LAL)
Issuing the RDA command with Bank Addresses and Upper Addresses to the idle bank puts the bank designated by Bank Address in
a read mode. When the LAL command with Lower Addresses is issued at the next clock of the RDA command, the data is read out
sequentially synchroniaing with the both edges of DQS output signal (Burst Read Operation). The initial valid read data appears after
CAS latency, the burst length of read data and the burst type must be set in the Mode Register beforehand. The read operated bank
goes back automatically to the idle state after I
RC
.
Write Operation (1st command + 2nd command = WRA + LAL)
Issuing the WRA command with Bank Addresses and Upper Addresses to the idle bank puts the bank designated by Bank Address
in a write mode. When the LAL command with Lower Addresses is issued at the next clock of the WRA command, the input data is
latched sequentially synchronizing with the both edges of DQS input signal (Burst Write Operation). The data and DQS inputs have to
be asserted in keeping with clock input after CAS latency-1 from the issuing of the LAL command. The write data length is set by the
VW in the LAL command. The DQS have to be provided for a burst length. The CAS latency and the burst type must be set in the
Mode Register beforehand. The write operated bank goes back automatically to the idle state after I
RC
.
Auto-Refresh Operation (1st command + 2nd command = WRA + REF)
K4C560838/1638C-TC are required to refresh like a standard SDRAM. The Auto-Refresh operation is begun with the REF command
following to the WRA command. The Auto-Refresh mode can be effective only when all banks are in the idle state and all outputs are
in Hi-z states. In a point to notice, the write mode started with the WRA command is canceled by the REF command having gone into
the next clock of the WRA command instead of the LAL command. The minimum period between the Auto-Refresh command and the
next command is specified by I
REFC
. However, about a synthetic average interval of Auto-Refresh command, it must be careful. In
case of equally distributed refresh, Auto-Refresh command has to be issued within once for every 7.8us by the maximum In case of
burst refresh or random distributed refresh, the average interval of eight consecutive Auto-Refresh command has to be more than
400ns always. In other words, the number of Auto-Refresh cycles which can be performed within 3.2us (8x400ns) is to 8 times in the
maximum.
Self-Refresh Operation (1st command + 2nd command = WRA + REF with PD="L")
It is the function of Self-Refresh operation that refresh operation can be performed automatically by using an internal timer. When all
banks are in the idle state and all outputs are in Hi-z states, the K4C560838/1638C-TC become Self-Refresh mode by issuing the Self-
Refresh command. PD has to be brought to "Low" within t
FPDL
from the REF command following to the WRA command for a Self-
Refresh mode entry. In order to satisfy the refresh period, the Self-Refresh entry command should be asserted within 7.8us after the
latest Auto-Refresh command. Once the device enters Self-Refresh mode, the DESL command must be continued for I
REFC
period. In
addition, it is desirable that clock input is kept in I
CKD
period. The device is in Self-Refresh mode as long as PD held "Low". During
Self-Refresh mode, all input and output buffers except for PD are disabled, therefore the power dissipation lowers. Regarding a Self-
Refresh mode exit, PD has to be changed over from "Low" to "High" along with the DESL command, and the DESL command has to
be continuously issued in the number of clocks specified by I
REFC
. The Self-Refresh exit function is asynchronous operation. It is
required that one Auto-Refresh command is issued to avoid the violence of the refresh period just after I
REFC
from Self-Refresh exit.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4C560838C-TCD4 | Aluminum Electrolytic Radial Lead High Ripple, Long Life Capacitor; Capacitance: 150uF; Voltage: 200V; Case Size: 16x31.5 mm; Packaging: Bulk |
| K4C560838C-TCDA | Aluminum Electrolytic Radial Lead High Ripple, Long Life Capacitor; Capacitance: 220uF; Voltage: 200V; Case Size: 18x31 mm; Packaging: Bulk |
| K4C561638C-TCD3 | 256Mb Network-DRAM |
| K4C561638C-TCD4 | Aluminum Electrolytic Radial Lead High Ripple, Long Life Capacitor; Capacitance: 33uF; Voltage: 200V; Case Size: 12.5x20 mm; Packaging: Bulk |
| K4C561638C-TCD4000 | Aluminum Electrolytic Radial Lead High Ripple, Long Life Capacitor; Capacitance: 47uF; Voltage: 200V; Case Size: 12.5x20 mm; Packaging: Bulk |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4C560838C-TCD4 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb Network-DRAM |
| K4C560838C-TCDA | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb Network-DRAM |
| K4C561638C-TCD3 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb Network-DRAM |
| K4C561638C-TCD4 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb Network-DRAM |
| K4C561638C-TCD4000 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb Network-DRAM |
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