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參數(shù)資料
| 型號： | K4C561638C-TCDA |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 256Mb Network-DRAM |
| 中文描述： | 256Mb的網(wǎng)絡內存 |
| 文件頁數(shù)： | 9/42頁 |
| 文件大?。?/td> | 880K |
| 代理商： | K4C561638C-TCDA |
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K4C5608/1638C 256Mb Network-DRAM
REV. 0.7 Aug. 2003
- 9 -
1. All voltages are referenced to Vss, VssQ.
2. V
REF
is expected to track variations in VddQ DC level of the transmitting device.
Peak to peak AC noise on V
REF
may not exceed ± 2% of V
REF
(DC).
3. Overshoot Iimit : V
IH
(max.) = VddQ + 0.9V with a pulse width <= 5ns
4. Undershoot Iimit : V
IL
(min.) = -0.9V with a pulse width <= 5ns
5. V
IH
(DC) and V
IL
(DC) are levels to maintain the current logic state.
6. V
IH
(AC) and V
IL
(AC) are levels to change to the new logic state.
7. V
ID
is magnitude of the difference between CK input level and CK input level.
8. The value of Vx(AC) is expected to equal VddQ/2 of the transmitting device.
9. V
ISO
means [V
ICK
(CK) + V
ICK
(CK)]/2
10. Refer to the figure below.
Notes
:
11. In the case of external termination, VTT(Termination Voltage) should be gone in the range of V
REF
(DC) ± 0.04V.
Pin Capacitance
(Vdd, VddQ = 2.5V, f = 1MHz, Ta = 25
×
°
C
)
Note :
These parameters are periodically sampled and not 100% tested.
2 The NC
2
pins have additional capacitance for adjustment of the adjacent pin capacitance.
1 The NC
2
pins have Power and Ground clamp.
Symbol
Parameter
Min
Max
Units
C
IN
Input Pin Capacitance
2.5
4.0
pF
C
INC
Clock Pin (CK, CK) Capacitance
2.5
4.0
pF
C
I/O
I/O Pin (DQ, DQS) Capacitance
3.0
6.0
pF
C
NC1
NC1 Pin Capacitance
-
1.5
pF
C
NC2
NC2 Pin Capacitance
4.0
6.0
pF
CLK
CLK
V
SS
V
ID
(AC)
0 V Differential
V
ISO
V
SS
V
ICK
V
ISO
(min)
V
X
V
X
V
X
V
X
V
ICK
V
ICK
V
ICK
V
ISO
(max)
V
X
V
ID
(AC)
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