參數(shù)資料
型號(hào)： K4C89323AF-GCF5
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
中文描述： 2097152 - 4字×銀行× 36位的雙數(shù)據(jù)速率網(wǎng)絡(luò)內(nèi)存
文件頁(yè)數(shù)： 3/58頁(yè)
文件大?。?/td> 1340K
代理商： K4C89323AF-GCF5
K4C89363AF
REV. 0.0 Nov. 2002
- 3 -
2 , 0 9 7 , 1 5 2 - W O R D S x 4 B A N K S x 3 6 - B I T S D O U B L E D A T A R A T E N e t w o r k - D R A M
DESCRIPTION
K4C89363AF is a CMOS Double Data Rate Network-DRAM containing 301,989,888 memory cells. K4C89363AF is organized as
2,097,152-words x 4 banks x36 bits. K4C89363AF feature a fully synchronous operation referenced to clock edge whereby all opera-
tions are synchronized at a clock input which enables high performance and simple user interface coexistence. K4C89363AD can
operate fast core cycle compared with regular DDR SDRAM.
K4C89363AF is suitable for Server, Network and other applications where large memory density and low power consumption are
required. The Output Driver for Network-DRAM is capable of high quality fast data transfer under light loading condition.
F E A T U R E S
P a r a m e t e r
K 4 C 8 9 3 6 3 A F
F6
F B
F5
t
CK
Clock Cycle Time (min)
CL = 4
4.0 ns
4.5 ns
5.0 ns
CL = 5
3.33 ns
3.75 ns
4.5 ns
CL = 6
3.0ns
3.33 ns
4.0 ns
t
RC
Random Read/Write Cycle Time (min)
20.0 ns
22.5 ns
2 5 n s
t
RAC
Random Access Time (min)
20.0 ns
22.5 ns
2 5 n s
I
DD1S
Operating Current (single bank) (max)
T B D
TBD
T B D
I
DD2S
Power Down Current (max)
T B D
TBD
T B D
I
DD3S
Self-Refresh Current (max)
T B D
TBD
T B D
Fully Synchronous Operation
- Double Data Rate (DDR)
- Data input/output are synchronized with both edges of DS / QS.
- Differential Clock (CLK and C L K ) inputs
- C S, FN and all address input signals are sampled on the positive edge of CLK.
- Output data (DQs and QS) is aligned to the crossings of CLK and C L K .
Fast clock cycle time of 3.0 ns minimum
- Clock : 333 MHz maximum
- Data : 666 Mbps/pin maximum
Quad Independent Banks operation
Fast cycle and Short Latency
Selectable Data Strobe(Uni/Bi-directional data strobe)
Distributed Auto-Refresh cycle in 3.9us
Self-Refresh
P o w e r D o w n M o d e
Variable Write Length Control
Write Latency = C A S Latency-1
Programable C A S Latency and Burst Length
- C A S Laatency = 4, 5, 6
- Burst Length = 2,4
Organization : 2,097,152 words x 4 banks x 36 bits
Power Supply Voltage V
DD
: 2.5V
±
0.125V
V
DDQ
: 1.8V
±
0.1V
1.8V CMOS I/O comply with SSTL - 1.8 (half strength driver)
Package : 144Ball BGA, 1mm x 0.8mm Ball pitch
JTAG(for x36)
Notice : Network-DRAM is trademark of Samsung Electronics., Co LTD
相關(guān)PDF資料
PDF描述
K4C89323AF-GCF6 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
K4C89323AF-GCFB 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
K4C89323AF-TCF5 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
K4C89323AF-TCF6 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
K4C89323AF-TCFB 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K4C89323AF-GCF6 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
K4C89323AF-GCFB 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
K4C89323AF-TCF5 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
K4C89323AF-TCF6 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
K4C89323AF-TCFB 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
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