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參數(shù)資料
| 型號(hào)： | K4M511633E-Y |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
| 中文描述： | 8米× 16 × 4銀行在54FBGA移動(dòng)SDRAM |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 112K |
| 代理商： | K4M511633E-Y |
K4M511633E - Y(P)C/L/F
February 2004
Mobile-SDRAM
DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= -25 to 70
°
C)
NOTES:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Internal TCSR can be supported( In commercial Temp : Max 40
°
C/Max 70
°
C).
4. K4M511633E-Y(P)C**
5. K4M511633E-Y(P)L**
6. K4M511633E-Y(P)F**
7. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
Parameter
Symbol
Test Condition
Version
Unit
Note
-75
-1H
-1L
Operating Current
(One Bank Active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
O
= 0 mA
160
155
145
mA
1
Precharge Standby Current in
power-down mode
I
CC2
P
CKE
≤
V
IL
(max), t
CC
= 10ns
1.5
mA
I
CC2
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
1.5
Precharge Standby Current
in non power-down mode
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
20
mA
I
CC2
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
10
Active Standby Current
in power-down mode
I
CC3
P
CKE
≤
V
IL
(max), t
CC
= 10ns
8
mA
I
CC3
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
8
Active Standby Current
in non power-down mode
(One Bank Active)
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
45
mA
I
CC3
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
40
mA
Operating Current
(Burst Mode)
I
CC
4
I
O
= 0 mA
Page burst
4Banks Activated
t
CCD
= 2CLKs
230
210
210
mA
1
Refresh Current
I
CC
5
t
RC
≥
t
RC
(min)
350
335
305
mA
2
Self Refresh Current
I
CC
6
CKE
≤
0.2V
-C
1800
uA
4
-L
1500
5
-F
Internal TCSR
Max 40
Max 70
°
C
3
Full Array
850
1300
uA
6
1/2 of Full Array
600
900
1/4 of Full Array
500
700
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