參數(shù)資料
型號： K4N51163QC-ZC
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 512Mbit gDDR2 SDRAM
中文描述： 512MB的GDDR2 SDRAM的
文件頁數(shù)： 29/64頁
文件大?。?/td> 1420K
代理商： K4N51163QC-ZC
- 29 -
Rev 1.5 Oct. 2005
512M gDDR2 SDRAM
K4N51163QC-ZC
ODT (On Die Termination)
On Die Termination (ODT) is a feature that allows a DRAM to turn on/off termination resistance. For x16 configuration ODT is applied to
each DQ, UDQS/UDQS, LDQS/LDQS, UDM, and LDM signal via the ODT control pin. The ODT feature is designed to improve signal
integrity of the memory channel by allowing the DRAM controller to independently turn on/off termination resistance for any or all DRAM
devices. The ODT function is supported for ACTIVE and STANDBY modes, and turned off and not supported in SELF REFRESH mode.
ODT DC Electrical Characteristics
Note 1: Test condition for Rtt measurements
Measurement Definition for Rtt(eff): Apply V
IH
(AC) and V
IL
(AC) to test pin separately, then measure current I(V
IH
(AC)) and I( V
IL
(AC)) respec-
tively. V
IH
(AC), V
IL
(AC), and VDDQ values defined in SSTL_18
Measurement Definition for VM : Measure voltage (V
M
) at test pin (midpoint) with no load.
Parameter/Condition
Symbol
Min
Nom
Max
Units
Notes
Rtt effective impedance value for EMRS(A6,A2)=0,1; 75 ohm
Rtt1(eff)
60
75
90
ohm
1
Rtt effective impedance value for EMRS(A6,A2)=1,0; 150 ohm
Rtt2(eff)
120
150
180
ohm
1
Rtt mismatch tolerance between any pull-up/pull-down pair
Rtt(mis)
-3.75
+3.75
%
1
Rtt(eff) =
V
IH
(AC)
-
V
IL
(AC)
I(
V
IH
(AC)
) - I(
V
IL
(AC)
)
delta VM =
2 x Vm
V
DDQ
x 100%
- 1
Functional Representation of ODT
Input
Pin
DRAM
Input
Buffer
VSSQ
VSSQ
VDDQ
VDDQ
Rval2
Rval2
Rval1
Rval1
sw1
sw1
sw2
sw2
Selection among sw1, sw2 and sw3 is determined by “Rtt (nominal)” in EMRS
Termination included on all DQs, DM, DQS, DQS, RDQS, and RDQS pins.
Switch (sw1, sw2, sw3) is enabled by ODT pin.
VSSQ
VDDQ
Rval3
Rval3
sw3
sw3
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