參數(shù)資料
型號: K4N51163QC-ZC
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512Mbit gDDR2 SDRAM
中文描述: 512MB的GDDR2 SDRAM的
文件頁數(shù): 42/64頁
文件大?。?/td> 1420K
代理商: K4N51163QC-ZC
- 42 -
Rev 1.5 Oct. 2005
512M gDDR2 SDRAM
K4N51163QC-ZC
One write data mask (DM) pin for each 8 data bits (DQ) will be supported on gDDR2 SDRAMs, Consistent with the implementation on
gDDR SDRAMs. It has identical timings on write operations as the data bits, and though used in a uni-directional manner, is internally
loaded identically to data bits to insure matched system timing. DM of x16 bit organization is not used during read cycles.
DQS/
DQS
DQ
DM
t
DS
t
DH
t
DS
t
DH
Write
CK
CK
COMMAND
DQS/DQS
DQ
DM
Case 2 : max t
DQSS
DQS/DQS
DQ
DM
t
DQSS
t
DQSS
t
WR
Case 1 : min t
DQSS
V
IL
(ac)
V
IH
(ac)
V
IL
(dc)
V
IH
(dc)
V
IL
(ac)
V
IL
(dc)
V
IH
(ac)
V
IH
(dc)
Write data mask
Data Mask Timing
Data Mask Function, WL=3, AL=0, BL = 4 shown
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