參數(shù)資料
型號: K4R881869
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
中文描述: 288Mbit RDRAM的為512k × 18位× 2 * 16屬銀行直接RDRAMTM
文件頁數(shù): 10/64頁
文件大?。?/td> 4084K
代理商: K4R881869
Page 8
Direct RDRAM
K4R881869M
Rev. 0.9 Jan. 2000
Preliminary
Field Encoding Summary
Table 6 shows how the six device address bits are decoded
for the ROWA and ROWR packets. The DR4T and DR4F
encoding merges a fifth device bit with a framing bit. When
neither bit is asserted, the device is not selected. Note that a
broadcast operation is indicated when both bits are set.
Broadcast operation would typically be used for refresh and
power management commands. If the device is selected, the
DM (DeviceMatch) signal is asserted and an ACT or ROP
command is performed.
Table 7 shows the encodings of the remaining fields of the
ROWA and ROWR packets. An ROWA packet is specified
by asserting the AV bit. This causes the specified row of the
specified bank of this device to be loaded into the associated
sense amps.
An ROWR packet is specified when AV is not asserted. An
11 bit opcode field encodes a command for one of the banks
of this device. The PRER command causes a bank and its
two associated sense amps to precharge, so another row or
an adjacent bank may be activated. The REFA (refresh-acti-
vate) command is similar to the ACT command, except the
row address comes from an internal register REFR, and
REFR is incremented at the largest bank address. The REFP
(refresh-precharge) command is identical to a PRER
command.
The NAPR, NAPRC, PDNR, ATTN, and RLXR commands
are used for managing the power dissipation of the RDRAM
and are described in more detail in
Power State Manage-
ment
on page 38. The TCEN and TCAL commands are
used to adjust the output driver slew rate and they are
described in more detail in
Current and Temperature
Control
on page 43.
Table 6: Device Field Encodings for ROWA Packet and ROWR Packet
DR4T
DR4F
Device Selection
Device Match signal (DM)
1
1
All devices (broadcast)
DM is set to 1
0
1
One device selected
DM is set to 1 if {DEVID4..DEVID0} == {0,DR3..DR0} else DM is set to 0
1
0
One device selected
DM is set to 1 if {DEVID4..DEVID0} == {1,DR3..DR0} else DM is set to 0
0
0
No packet present
DM is set to 0
Table 7: ROWA Packet and ROWR Packet Field Encodings
DM
a
AV
ROP10..ROP0 Field
Name
Command Description
10
9
8
7
6
5
4
3
2:0
0
-
-
-
-
-
-
-
-
-
---
-
No operation.
1
1
Row address
ACT
Activate row R8..R0 of bank BR4..BR0 of device and move device to ATTN
b
.
1
0
1
1
0
0
0
x
c
x
x
000
PRER
Precharge bank BR4..BR0 of this device.
1
0
0
0
0
1
1
0
0
x
000
REFA
Refresh (activate) row REFR8..REFR0 of bank BR3..BR0 of device.
Increment REFR if BR4..BR0 = 1111 (see Figure 50).
1
0
1
0
1
0
1
0
0
x
000
REFP
Precharge bank BR4..BR0 of this device after REFA (see Figure 50).
1
0
x
x
0
0
0
0
1
x
000
PDNR
Move this device into the powerdown (PDN) power state (see Figure 47).
1
0
x
x
0
0
0
1
0
x
000
NAPR
Move this device into the nap (NAP) power state (see Figure 47).
1
0
x
x
0
0
0
1
1
x
000
NAPRC
Move this device into the nap (NAP) power state conditionally
1
0
x
x
x
x
x
x
x
0
000
ATTN
b
Move this device into the attention (ATTN) power state (see Figure 45).
1
0
x
x
x
x
x
x
x
1
000
RLXR
Move this device into the standby (STBY) power state (see Figure 46).
1
0
0
0
0
0
0
0
0
x
001
TCAL
Temperature calibrate this device (see Figure 52).
1
0
0
0
0
0
0
0
0
x
010
TCEN
Temperature calibrate/enable this device (see Figure 52).
1
0
0
0
0
0
0
0
0
0
000
NOROP
No operation.
a. The DM (Device Match signal) value is determined by the DR4T,DR4F, DR3..DR0 field of the ROWA and ROWR packets. See Table 6.
b. The ATTN command does not cause a RLX-to-ATTN transition for a broadcast operation (DR4T/DR4F=1/1).
c. An
x
entry indicates which commands may be combined. For instance, the three commands PRER/NAPRC/RLXR may be specified in one ROP value (011000111000).
相關PDF資料
PDF描述
K4R881869M 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
K4R881869M-NbCcG6 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
K4R881869M-NCK7 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
K4R881869M-NCK8 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
K4S280432A 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
相關代理商/技術參數(shù)
參數(shù)描述
K4R881869D 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256/288Mbit RDRAM(D-die)
K4R881869D-FCM8 制造商:Samsung Electro-Mechanics 功能描述:16M X 18 DIRECT RAMBUS DRAM, PBGA92
K4R881869EFCT9 制造商:Samsung Semiconductor 功能描述:
K4R881869E-GCM8000 制造商:Samsung Semiconductor 功能描述:DRAM CHIP DIRECT RDRAM 288MBIT 2.5V 92PIN WBGA - Bulk
K4R881869E-GCM8T00 制造商:Samsung Semiconductor 功能描述:288MRDRAMDIRECT RDRAMX18WBGA - Tape and Reel