參數(shù)資料
型號: K4R881869M-NbCcG6
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
中文描述: 288Mbit RDRAM的為512k × 18位× 2 * 16屬銀行直接RDRAMTM
文件頁數(shù): 39/64頁
文件大小: 4084K
代理商: K4R881869M-NBCCG6
Page 37
Direct RDRAM
K4R881869M
Rev. 0.9 Jan. 2000
Preliminary
Figure 42: SKIP Register
Figure 43: TEST Registers
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Read/write register (except AS field).
Reset value is zero (SIO Reset).
AS - Autoskip. Read-only value determined by
autoskip circuit and stored when SETF serial command
is received by RDRAM during initialization. In figure
58, AS=1 corresponds to the early Q(a1) packet and
AS=0 to the Q(a1) packet one t
CYCLE
later for the four
uncertain cases.
MSE - Manual skip enable (0=auto, 1=manual).
MS - Manual skip (MS must be 1 when MSE=1).>
During initialization, the RDRAMs at the furthest point
in the fifth read domain may have selected the AS=0
value, placing them at the closest point in a sixth read
domain. Setting the MSE/MS fields to 1/1 overrides
the autoskip value and returns them to the furthest
point of the fifth read domain.
Control Register: SKIP
Address: 04b
16
0
0
0
0
0
0
0
0
0
0
0
0
0
AS
0
0
MSE MS
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Read/write registers.
Reset value of TEST78,79 is zero ( SIO Reset).
Do not read or write TEST78,79 after SIO reset.
TEST77 must be written with zero after SIO reset.
These registers must only be used for testing purposes.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Control Register: TEST77
Address: 04d
16
Address: 04e
16
Address: 04f
16
Control Register: TEST78
Control Register: TEST79
Figure 44: TCYCLE Register
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Read/write register.
Reset value is undefined
TCYCLE13..0 - Specifies the value of the t
CYCLE
datasheet parameter in 64ps units. For the t
CYCLE,MIN
of 2.5ns (2500ps), this field should be written with the
value
00027
16
(3964ps).
Control Register: TCYCLE
Address: 04c
16
0
0
TCYCLE13..TCYCLE0
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