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參數(shù)資料
| 型號(hào)： | K4S280432C |
| 廠(chǎng)商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL |
| 中文描述： | 128Mbit SDRAM的8米× 4位× 4銀行同步DRAM LVTTL |
| 文件頁(yè)數(shù)： | 3/11頁(yè) |
| 文件大?。?/td> | 112K |
| 代理商： | K4S280432C |
K4S280432C
CMOS SDRAM
Rev. 0.0 Mar. 2000
The
K4S280432C
is 134,217,728 bits synchronous high data
rate Dynamic RAM organized as 4 x 8,388,608 words by 4 bits,
fabricated with SAMSUNG
′
s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable burst
length and programmable latencies allow the same device to be
useful for a variety of high bandwidth, high performance mem-
ory system applications.
JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4 & 8 )
-. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system
clock.
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (4K Cycle)
GENERAL DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
8M x 4Bit x 4 Banks Synchronous DRAM
Bank Select
Data Input Register
8M x 4
8M x 4
S
O
I
Column Decoder
Latency & Burst Length
Programming Register
A
R
R
R
C
L
L
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
8M x 4
8M x 4
Timing Register
* Samsung Electronics reserves the right to change products or specification without notice.
ORDERING INFORMATION
Part No.
Max Freq.
133MHz(CL=3)
100MHz(CL=2)
100MHz(CL=3)
Interface Package
K4S280432C-TC/L75
K4S280432C-TC/L1H
K4S280432C-TC/L1L
LVTTL
54
TSOP(II)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4S280432F-UC | 128Mb F-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S280432F-TCL75 | 128Mb F-die SDRAM Specification |
| K4S280432F-UL75 | 128Mb F-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S280432F-UC75 | 128Mb F-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) |
| K4S280432M | 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4S280432C-TC/L1H | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL |
| K4S280432C-TC/L1L | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL |
| K4S280432C-TC/L75 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL |
| K4S280432D | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL |
| K4S280432D-TC/L1H | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL |
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