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參數(shù)資料
| 型號： | K4S511633C-YL |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Mx16 Mobile SDRAM 54CSP 1/CS |
| 中文描述： | 32Mx16移動(dòng)SDRAM 54CSP 1/CS |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 61K |
| 代理商： | K4S511633C-YL |
K4S511633C-YL/N/P
Rev. 1.2 Dec. 2002
CMOS SDRAM
3.0V power supply
LVCMOS compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
-. CAS latency (1 & 2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system
clock.
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (8K cycle)
1 /CS Support.
Commercial Temperature Operation (-25
°
C ~ 70
°
C).
Extended Temperature Operation (-25
°
C ~ 85
°
C).
Industrial Temperature Operation (-40
°
C ~ 85
°
C).
54balls DDP CSP
FEATURES
FUNCTIONAL BLOCK DIAGRAM
8M x 16Bit x 4 Banks Mobile SDRAM
ORDERING INFORMATION
- YN : Low Power, Operating Temp : -25
°
C ~ 85
°
C.
- YL : Low Power, Operating Temp : -25
°
C ~ 70
°
C.
- YP : Low Power, Operating Temp : -40
°
C ~ 85
°
C.
Note :
1. In case of 33MHz Frequency, CL1 can be supported.
Part No.
Max Freq.
Interface
Package
K4S511633C-YL/N80
125MHz(CL=3)
100MHz(CL=2)
LVCMOS
54 CSP
K4S511633C-YL/N1H
100MHz(CL=2)
K4S511633C-YL/N1L
100MHz(CL=3)
*1
The K4S511633C is 536,870,912 bits synchronous high data
rate Dynamic RAM organized as 4 x 8,388,608 words by 16bits,
fabricated with SAMSUNG's high performance CMOS technology.
Synchronous design allows precise cycle control with the use of
system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and
programmable latencies allow the same device to be useful for a
variety of high bandwidth, high performance memory system
applications.
GENERAL DESCRIPTION
Samsung Electronics reserves the right to
change products or specification without
notice.
*
Bank Select
Data Input Register
8M x 16
8M x 16
S
O
I
Column Decoder
Latency & Burst Length
Programming Register
A
R
R
R
C
L
L
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
8M x 16
8M x 16
Timing Register
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4S511633F-F1H | 8M x 16Bit x 4 Banks Mobile SDRAM |
| K4S511633F-F1L | 8M x 16Bit x 4 Banks Mobile SDRAM |
| K4S511633F-F75 | 8M x 16Bit x 4 Banks Mobile SDRAM |
| K4S511633F-L | 8M x 16Bit x 4 Banks Mobile SDRAM |
| K4S511633F-YC | 8M x 16Bit x 4 Banks Mobile SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4S511633C-YL/N1H | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx16 Mobile SDRAM 54CSP 1/CS |
| K4S511633C-YL/N1L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx16 Mobile SDRAM 54CSP 1/CS |
| K4S511633C-YL/N80 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mx16 Mobile SDRAM 54CSP 1/CS |
| K4S511633F | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 16Bit x 4 Banks Mobile SDRAM |
| K4S511633F-F1H | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 16Bit x 4 Banks Mobile SDRAM |
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