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參數(shù)資料
| 型號(hào)： | K6X8008T2B-Q |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | CMOS SRAM |
| 中文描述： | CMOS SRAM的 |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 129K |
| 代理商： | K6X8008T2B-Q |
K6X8008T2B Family
Revision 1.0
September 2003
6
CMOS SRAM
Address
Data Out
Previous Data Valid
Data Valid
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1)
(Address Controlled
,
CS
1
=OE=V
IL
, CS
2
=WE=V
IH
)
t
AA
t
RC
t
OH
TIMING WAVEFORM OF READ CYCLE(2)
(WE=V
IH
)
Data Valid
High-Z
CS
1
Address
OE
Data ou
t
NOTES
(READ CYCLE)
1.
t
HZ
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
levels.
2. At any given temperature and voltage condition,
t
HZ
(Max.) is less than
t
LZ
(Min.) both for a given device and from device to device
interconnection.
CS
2
t
OH
t
AA
t
OLZ
t
LZ
t
OHZ
t
HZ(1,2)
t
RC
t
CO2
t
OE
t
CO1
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| K6X8016T3B-F | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx16 bit Low Power Full CMOS Static RAM |
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| K6X8016T3B-TF55 | 制造商:Samsung Semiconductor 功能描述: |
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