參數(shù)資料
型號(hào): K7D323674A-HC37
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 32Mb A-die DDR SRAM Specification
中文描述: 32兆甲芯片的DDR SRAM的規(guī)范
文件頁(yè)數(shù): 15/19頁(yè)
文件大?。?/td> 494K
代理商: K7D323674A-HC37
Rev 1.4
Oct. 2005
1Mx36 & 2Mx18 SRAM
- 15
K7D321874A
K7D323674A
TIMING WAVEFORMS FOR SINGLE DATA RATE CYCLES
(Burst Length=4, 2, 1)
NOTE
:
1. Q
01
refers to output from address A
0
. Q
02
refers to output from the next internal burst address following A
0
, etc.
2. Outputs are disabled(High-Z) one clock cycle after NOP detected or after no pending data requests are present.
3. This devices supports cycle lengths of 1, 2, 4. Continue(B1=HIGH, B2=HIGH, B3=X) up to three times following a B1 operation. Any further
Continue assertions constitute invalid operations.
4. This device will have an address wraparound if further Continues are applied.
NOP
CONTINUE
t
KHKH
t
AVKH
t
KHAX
NOP
1
2
3
4
5
6
7
8
10
12
11
READ
(burst of 4)
(burst of 2)
READ
READ
(burst of 1)
NOP
WRITE
CONTINUE
WRITE
(burst of 2)
READ
9
CONTINUE
READ
CONTINUE
READ
CONTINUE
READ
A
0
A
1
A
2
A
3
Q
X1
D
22
D
21
t
BVKH
t
KHBX
t
CHQZ
t
KXCH
t
CHLZ
t
CHQV
t
CHQX
t
DVKH
t
KHDX
t
KLKH
Q
31
Q
01
Q
02
Q
03
Q
04
Q
11
UNDEFINED
DON’T CARE
t
KHKL
K
K
B1
SA
B2
B3
DQ
CQ
CQ
t
CHCL
t
CLCH
t
KXCL
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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K7D323674A-HGC40 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32Mb A-die DDR SRAM Specification
K7D323674C 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Mx36 & 2Mx18 SRAM