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參數(shù)資料
| 型號： | K7J643682M-FC20 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 72Mb M-die DDRII SRAM Specification |
| 中文描述： | 72Mb的M -模條DDRII規(guī)格的SRAM |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 326K |
| 代理商： | K7J643682M-FC20 |
2Mx36 & 4Mx18 DDR II SIO b2 SRAM
K7J643682M
K7J641882M
- 8 -
Rev 1.0
Aug. 2005
WRITE TRUTH TABLE
(x18)
Notes:
1. X means "Don
′
t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K (
↑
).
3. Assumes a WRITE cycle was initiated.
4. This table illustates operation for x18 devices.
K
K
BW
0
BW
1
OPERATION
↑
L
L
WRITE ALL BYTEs ( K
↑
)
↑
L
L
WRITE ALL BYTEs ( K
↑
)
WRITE BYTE 0 ( K
↑
)
WRITE BYTE 0 ( K
↑
)
WRITE BYTE 1 ( K
↑
)
WRITE BYTE 1 ( K
↑
)
WRITE NOTHING ( K
↑
)
WRITE NOTHING ( K
↑
)
↑
L
H
↑
L
H
↑
H
L
↑
H
L
↑
H
H
↑
H
H
WRITE TRUTH TABLE
(x36)
Notes:
1. X means "Don
′
t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K (
↑
).
3. Assumes a WRITE cycle was initiated.
K
K
BW
0
BW
1
BW
2
BW
3
OPERATION
↑
L
L
L
L
WRITE ALL BYTEs ( K
↑
)
↑
L
L
L
L
WRITE ALL BYTEs ( K
↑
)
WRITE BYTE 0 ( K
↑
)
WRITE BYTE 0 ( K
↑
)
WRITE BYTE 1 ( K
↑
)
WRITE BYTE 1 ( K
↑
)
WRITE BYTE 2 and BYTE 3 ( K
↑
)
WRITE BYTE 2 and BYTE 3 ( K
↑
)
WRITE NOTHING ( K
↑
)
WRITE NOTHING ( K
↑
)
↑
L
H
H
H
↑
L
H
H
H
↑
H
L
H
H
↑
H
L
H
H
↑
H
H
L
L
↑
H
H
L
L
↑
H
H
H
H
↑
H
H
H
H
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
Notes:
1. X means "Don
′
t Care".
2. The rising edge of clock is symbolized by (
↑
).
3. Before enter into clock stop status, all pending read and write operations will be completed.
K
LD
R/W
D
Q
OPERATION
D(A0)
D(A1)
Q(A0)
Q(A1)
Stopped
X
X
Previous state
Previous state
Previous state
Previous state
Clock Stop
↑
H
X
X
X
High-Z
High-Z
No Operation
↑
L
H
X
X
D
OUT
at C(t+1)
D
OUT
at C(t+2)
Read
↑
L
L
Din at K(t+1)
Din at K(t+1)
High-Z
High-Z
Write
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|---|---|
| K7J643682M-FC25 | 72Mb M-die DDRII SRAM Specification |
| K7J643682M-FC30 | 72Mb M-die DDRII SRAM Specification |
| K7J643682M-FECI16 | 72Mb M-die DDRII SRAM Specification |
| K7J643682M-FECI20 | 72Mb M-die DDRII SRAM Specification |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7J643682M-FC25 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb M-die DDRII SRAM Specification |
| K7J643682M-FC30 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb M-die DDRII SRAM Specification |
| K7J643682M-FECI16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb M-die DDRII SRAM Specification |
| K7J643682M-FECI20 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb M-die DDRII SRAM Specification |
| K7J643682M-FECI25 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb M-die DDRII SRAM Specification |
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