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參數(shù)資料
| 型號： | K7N163645M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36 & 1Mx18-Bit Pipelined NtRAMTM |
| 中文描述： | 512Kx36 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 468K |
| 代理商： | K7N163645M |
K7N163645M
K7N161845M
512Kx36 & 1Mx18 Pipelined N
t
RAM
TM
- 11 -
Rev 1.0
January 2000
DC ELECTRICAL CHARACTERISTICS
(V
DD
=2.5V
±
5%, T
A
=0
°
C to +70
°
C)
Notes :
1. Reference AC Operating Conditions and Characteristics for input and timing.
2. Data states are all zero.
3. In Case of I/O Pins, the Max. V
IH
=V
DDQ
+0.3V
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
UNIT
NOTES
Input Leakage Current(except ZZ)
I
IL
V
DD
=Max ; V
IN
=V
SS
to V
DD
-2
+2
μ
A
μ
A
Output Leakage Current
I
OL
Output Disabled,
-2
+2
Operating Current
I
CC
V
DD
=Max , I
OUT
=0mA
Cycle Time
≥
t
CYC
Min
-16
-
320
mA
1,2
-15
-
300
-13
-
280
-10
-
250
Standby Current
I
SB
Device deselected, I
OUT
=0mA,
ZZ
≤
V
IL
, f=Max,
All Inputs
≤
0.2V or
≥
V
DD
-0.2V
-16
-
70
mA
-15
-
60
-13
-
50
-10
-
40
I
SB1
Device deselected, I
OUT
=0mA, ZZ
≤
0.2V, f=0,
All Inputs=fixed (V
DD
-0.2V or 0.2V)
-
30
mA
I
SB2
Device deselected, I
OUT
=0mA, ZZ
≥
V
DD
-0.2V,
f=Max, All Inputs
≤
V
IL
or
≥
V
IH
-
30
mA
Output Low Voltage
V
OL
I
OL
=1.0mA
-
0.4
V
Output High Voltage
V
OH
I
OH
=-1.0mA
2.0
-
V
Input Low Voltage
V
IL
-0.3*
0.7
V
Input High Voltage
V
IH
1.7
V
DD
+0.3**
V
3
(T
A
=0 to 70
°
C, V
DD
=2.5V
±
5%, unless otherwise specified)
TEST CONDITIONS
PARAMETER
VALUE
Input Pulse Level
0 to 2.5V
Input Rise and Fall Time(Measured at 20% to 80%)
1.0V/ns
Input and Output Timing Reference Levels
1.25V
Output Load
See Fig. 1
V
SS
V
IH
V
SS-
0.8V
20% t
CYC
(MIN)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7N163645M-HC15 | 制造商:Samsung Semiconductor 功能描述: |
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