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參數(shù)資料
| 型號： | K7N163645M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36 & 1Mx18-Bit Pipelined NtRAMTM |
| 中文描述： | 512Kx36 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 468K |
| 代理商： | K7N163645M |
K7N163645M
K7N161845M
512Kx36 & 1Mx18 Pipelined N
t
RAM
TM
- 8 -
Rev 1.0
January 2000
STATE DIAGRAM FOR N
t
RAM
TM
BEGIN
WRITE
BURST
WRITE
BEGIN
READ
WRITE
DS
READ
DS
BURST
READ
WRITE
DS
READ
DS
READ
D
WRTE
B
DESELECT
B
R
B
W
READ
WRITE
BURST
BURST
Notes :
1. An IGNORE CLOCK EDGE cycle is not shown is the above diagram. This is because CKE HIGH only blocks the clock(CLK) input and does
not change the state of the device.
2. States change on the rising edge of the clock(CLK)
COMMAND
ACTION
DS
DESELECT
READ
BEGIN READ
WRITE
BEGIN WRITE
BURST
BEGIN READ
BEGIN WRITE
CONTINUE DESELECT
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PDF描述 |
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| K7N401801M | TPS55065EVM Evaluation Module |
| K7N403601M | TPS54162EVM Evaluation Module |
| K7N401809B-QC20 | 128Kx36 & 256Kx18 Pipelined NtRAMTM |
| K7N403601B-QC13 | 128Kx36 & 256Kx18 Pipelined NtRAMTM |
| K7N403609B-QC20 | 128Kx36 & 256Kx18 Pipelined NtRAMTM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7N163645M-HC15 | 制造商:Samsung Semiconductor 功能描述: |
| K7N163645M-QC15 | 制造商:Samsung Electro-Mechanics 功能描述:Synchronous SRAM, 512K x 36, 100 Pin, Plastic, QFP |
| K7N163645MQC15000 | 制造商:Samsung Semiconductor 功能描述: |
| K7N163645M-QC16000 | 制造商:Samsung SDI 功能描述:INQ #76-65567 |
| K7N163645-QC13 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18-Bit Flow Through NtRAM |
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