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參數(shù)資料
| 型號： | K7N403601M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | TPS54162EVM Evaluation Module |
| 中文描述： | 128K × 36至 |
| 文件頁數(shù)： | 1/17頁 |
| 文件大?。?/td> | 273K |
| 代理商： | K7N403601M |
K7N403601M
K7N401801M
128Kx36 & 256Kx18 Pipelined N
t
RAM
TM
- 1 -
Rev 3.0
May 1999
Document Title
128Kx36 & 256Kx18-Bit Pipelined N
t
RAM
TM
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
Revision History
Rev. No.
0.0
0.1
0.2
0.3
1.0
2.0
3.0
Remark
Preliminary
Preliminary
Preliminary
Preliminary
Final
Final
Final
History
1. Initial document.
1. Changed t
CD
,t
OE
from 4.0ns to 4.2ns at -75
2. Changed DC condition at Icc and parameters
I
SB1
; from 10mA to 30mA,
I
SB2
; from 10mA to 30mA.
Add
V
DDQ
Supply voltage( 2.5V I/O )
Changed V
OL
Max value from 0.2V to 0.4V at 2.5V I/O.
Final spec Release.
Remove V
DDQ
Supply voltage( 2.5V I/O )
Add
V
DDQ
Supply voltage( 2.5V I/O )
Draft Date
July.06. 1998
Oct. 10 . 1998
Dec. 10. 1998
Dec. 23. 1998
Jan. 29. 1999
Feb. 25. 1999
May. 13. 1999
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| K7N403609B-PC20000 | 制造商:Samsung SDI 功能描述:SRAM Chip Sync Quad 3.3V 4M-Bit 128K x 36 2.8ns 100-Pin TQFP 制造商:Samsung Semiconductor 功能描述:SRAM Chip Sync Quad 3.3V 4M-Bit 128K x 36 2.8ns 100-Pin TQFP |
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