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參數(shù)資料
| 型號： | K7Q161882A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36 & 1Mx18 QDR b2 SRAM |
| 中文描述： | 512Kx36 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大小： | 503K |
| 代理商： | K7Q161882A |
512Kx36 & 1Mx18 QDR
TM
b2 SRAM
- 7 -
Rev 1.0
July 2002
K7Q163682A
K7Q161882A
READ
DDR READ
WRIDDR WRITE
READ NOP
POWER-UP
WRITE NOP
LOAD NEW
WRITE ADDRESS
LOAD NEW
READ ADDRESS
ALWAYS
(FIXED)
WRITE
STATE DIAGRAM
Notes
: 1. Internal burst counter is fixed as 2-bit linear, i.e. when first address is A0+0, next internal burst address is A0+1.
2. "READ" refers to read active status with R=Low, "READ" refers to read inactive status with R=high. "WRITE" and "WRITE" are the same case.
3. Read and write state machine can be active simultaneously.
4. State machine control timing sequence is controlled by K.
ALWAYS
(FIXED)
READ
WRITE
READ
WRITE
READ
WRITE
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相關(guān)代理商/技術(shù)參數(shù) |
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| K7Q163652A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDRTM b2 SRAM |
| K7Q163654A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36-bit, 1Mx18-bit QDR SRAM |
| K7Q163654A-FC10 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36-bit, 1Mx18-bit QDR SRAM |
| K7Q163654A-FC13 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36-bit, 1Mx18-bit QDR SRAM |
| K7Q163654A-FC16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36-bit, 1Mx18-bit QDR SRAM |
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