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參數(shù)資料
| 型號(hào)： | K7Q163654A-FC20 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36-bit, 1Mx18-bit QDR SRAM |
| 中文描述： | 512Kx36位，1Mx18位的國防評估報(bào)告的SRAM |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 510K |
| 代理商： | K7Q163654A-FC20 |
512Kx36 & 1Mx18 QDR
TM
b4 SRAM
- 7 -
Rev 1.0
July. 2002
K7Q163654A
K7Q161854A
STATE DIAGRAM
Notes
: 1. Internal burst counter is fixed as 2-bit linear, i.e. when first address is A0+0, next internal burst address is A0+1.
2. "READ" refers to read active status with R=Low, "READ" refers to read inactive status with R=high. "WRITE" and "WRITE" are the same case.
3. Read and write state machine can be active simultaneously.
4. State machine control timing sequence is controlled by K.
READ
DDR READ
D count=D count+1
POWER-UP
WRITE NOP
LOAD NEW
READ ADDRESS
D count=0
ALWAYS
WRITE
ALWAYS
READ
WRITE
READ
D count=2
INCREMENT
READ ADDRESS
READ NOP
INCREMENT
WRITE ADDRESS
DDR WRITE
D count=D count+1
LOAD NEW
WRITE ADDRESS
D count=0
ALWAYS
READ
D count=1
READ
D count=2
ALWAYS
WRITE
D count=2
WRITE
D count=1
WRITE
D count=2
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PDF描述 |
|---|---|
| K7Q161862 | 512Kx36 & 1Mx18 QDRTM b2 SRAM |
| K7Q161862B | 512Kx36 & 1Mx18 QDRTM b2 SRAM |
| K7Q163662B | 512Kx36 & 1Mx18 QDRTM b2 SRAM |
| K7Q161882 | 512Kx36 & 1Mx18 QDR b2 SRAM |
| K7Q161882A | 512Kx36 & 1Mx18 QDR b2 SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7Q163662B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDRTM b2 SRAM |
| K7Q163662B-FC16T00 | 制造商:Samsung Semiconductor 功能描述:16MSYNCQUAD DATA RATE SRAME 512KX36FBGA, T/R - Tape and Reel |
| K7Q163664B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDR TM b4 SRAM |
| K7Q163664B_10 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDRTM b4 SRAM |
| K7Q163664B-FC16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDR TM b4 SRAM |
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