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參數(shù)資料
| 型號： | K7Q163654A-FC20 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36-bit, 1Mx18-bit QDR SRAM |
| 中文描述： | 512Kx36位，1Mx18位的國防評估報告的SRAM |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 510K |
| 代理商： | K7Q163654A-FC20 |
512Kx36 & 1Mx18 QDR
TM
b4 SRAM
- 8 -
Rev 1.0
July. 2002
K7Q163654A
K7Q161854A
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
Notes:
1. X means "Don
′
t Care".
2. The rising edge of clock is symbolized by (
↑
).
3. Before enter into clock stop status, all pending read and write operations will be completed.
K
R
W
D
Q
OPERATION
D(A1)
D(A2)
D(A3)
D(A4)
Q(A1)
Q(A2)
Q(A3)
Q(A4)
Stopped
X
X
Previous
state
Previous
state
Previous
state
Previous
state
Previous
state
Previous
state
Previous
state
Previous
state
Clock Stop
↑
H
H
X
X
X
X
High-Z
High-Z
High-Z
High-Z
No Operation
↑
L
X
X
X
X
X
D
OUT
at C(t+1)
D
OUT
at C(t+1)
D
OUT
at C(t+2)
D
OUT
at C(t+2)
Read
↑
H
L
Din
at K(t+1)
Din
at K(t+1)
Din
at K(t+2)
Din
at K(t+2)
X
X
X
X
Write
WRITE TRUTH TABLE
(x18)
Notes:
1. X means "Don
′
t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of CLK(
↑
).
K
K
W
BW
0
BW
1
OPERATION
↑
H
X
X
READ/NOP
↑
H
X
X
READ/NOP
↑
L
L
L
WRITE ALL BYTEs ( K
↑ )
WRITE ALL BYTEs ( K
↑ )
WRITE BYTE 0 ( K
↑ )
WRITE BYTE 0 ( K
↑ )
↑
L
L
L
↑
L
L
H
↑
L
L
H
↑
L
H
L
WRITE BYTE 1 ( K
↑ )
WRITE BYTE 1 ( K
↑ )
WRITE NOTHING ( K
↑ )
WRITE NOTHING ( K
↑ )
↑
L
H
L
↑
L
H
H
↑
L
H
H
WRITE TRUTH TABLE
(x36)
Notes:
1. X means "Don
′
t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of CLK(
↑
).
K
K
W
BW
0
BW
1
BW
2
BW
3
OPERATION
↑
H
X
X
X
X
READ/NOP
↑
H
X
X
X
X
READ/NOP
↑
L
L
L
L
L
WRITE ALL BYTEs ( K
↑ )
WRITE ALL BYTEs ( K
↑ )
WRITE BYTE 0 ( K
↑ )
WRITE BYTE 0 ( K
↑ )
↑
L
L
L
L
L
↑
L
L
H
H
H
↑
L
L
H
H
H
↑
L
H
L
H
H
WRITE BYTE 1 ( K
↑ )
WRITE BYTE 1 ( K
↑ )
WRITE BYTE 2 and BYTE 3 ( K
↑ )
WRITE BYTE 2 and BYTE 3 ( K
↑ )
WRITE NOTHING ( K
↑ )
WRITE NOTHING ( K
↑ )
↑
L
H
L
H
H
↑
L
H
H
L
L
↑
L
H
H
L
L
↑
L
H
H
H
H
↑
L
H
H
H
H
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