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參數(shù)資料
| 型號： | K7R160982B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36 & 1Mx18 & 2Mx9 QDRTM II b2 SRAM |
| 中文描述： | 512Kx36 |
| 文件頁數(shù)： | 14/19頁 |
| 文件大小： | 428K |
| 代理商： | K7R160982B |
512Kx36 & 1Mx18 & 2Mx9 QDR
TM
II b2 SRAM
- 14 -
Rev 3.0
June. 2004
K7R163682B
K7R161882B
K7R160982B
t
KLKH
t
KHKH
t
KHKH
t
KHKL
t
AVKH
t
KHAX
A1
A2
A3
t
IVKH
t
KHIX
t
CHQX
1
t
KHCH
t
CHQV
t
CHQX
t
CHQZ
t
CQHQV
t
CQHQX
t
CHCQX
t
CHCQV
t
CHQV
t
CHCQX
t
CHCQV
t
KLKH
t
KHKH
t
KHKL
t
KHKH
Note
:
1. Q1-1 refers to output from address A1+0, Q1-2 refers to output from address A1+1 i.e. the next internal burst address following A1+0.
2. Outputs are disabled one cycle after a NOP.
K
SA
R
K
Q(Data Out)
C
C
TIMING WAVE FORMS OF READ AND NOP
Don
′
t Care Undefined
CQ
CQ
Q1-1
Q1-2
Q2-1
Q2-2
Q3-1
t
KLKH
t
KHKH
t
KHKH
t
KHKL
t
AVKH
t
KHAX
A1
A2
A3
D1-1
D1-2
D2-1
D2-2
K
SA
W
K
D(Data In)
TIMING WAVE FORMS OF WRITE AND NOP
D3-1
D3-2
t
IVKH
t
KHIX
t
KHIX
t
DVKH
t
KHDX
Don
′
t Care Undefined
Note
:
1.D1-1 refers to input to address A1+0, D1-2 refers to input to address A1+1, i.e the next internal burst address following A1+0.
2. BWx ( NWx ) assumed active.
READ
NOP
NOP
READ
READ
WRITE
NOP
NOP
WRITE
WRITE
相關PDF資料 |
PDF描述 |
|---|---|
| K7R161882B | 512Kx36 & 1Mx18 & 2Mx9 QDRTM II b2 SRAM |
| K7R163682B | 512Kx36 & 1Mx18 & 2Mx9 QDRTM II b2 SRAM |
| K7R321884M-FC16 | 1Mx36 & 2Mx18 QDRTM II b4 SRAM |
| K7R323684M | 1Mx36 & 2Mx18 QDRTM II b4 SRAM |
| K7R323684M-FC16 | 1Mx36 & 2Mx18 QDRTM II b4 SRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K7R161882B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 & 2Mx9 QDRTM II b2 SRAM |
| K7R161884B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDRTM II b4 SRAM |
| K7R161884B-FC16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDR II b4 SRAM |
| K7R161884B-FC20 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDR II b4 SRAM |
| K7R161884B-FC25 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDR II b4 SRAM |
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