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參數(shù)資料
| 型號： | K7R161882B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36 & 1Mx18 & 2Mx9 QDRTM II b2 SRAM |
| 中文描述： | 512Kx36 |
| 文件頁數(shù)： | 5/19頁 |
| 文件大?。?/td> | 428K |
| 代理商： | K7R161882B |
512Kx36 & 1Mx18 & 2Mx9 QDR
TM
II b2 SRAM
- 5 -
Rev 3.0
June. 2004
K7R163682B
K7R161882B
K7R160982B
PIN CONFIGURATIONS
(TOP VIEW)
K7R160982B(2Mx9)
Notes:
1. * Checked No Connect(NC) pin is reserved for higher density address, i.e. 2A for 72Mb.
2. BW controls write to D0:D8 .
1
2
3
4
5
6
7
8
9
10
11
A
CQ
V
SS
/SA*
SA
W
NC
K
NC
R
SA
Vss
CQ
B
NC
NC
NC
SA
NC
K
BW
SA
NC
NC
Q3
C
NC
NC
NC
V
SS
SA
SA
SA
V
SS
NC
NC
D3
D
NC
D4
NC
V
SS
V
SS
V
SS
V
SS
V
SS
NC
NC
NC
E
NC
NC
Q4
V
DDQ
V
SS
V
SS
V
SS
V
DDQ
NC
D2
Q2
F
NC
NC
NC
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
NC
NC
NC
G
NC
D5
Q5
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
NC
NC
NC
H
Doff
V
REF
V
DDQ
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
V
DDQ
V
REF
ZQ
J
NC
NC
NC
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
NC
Q1
D1
K
NC
NC
NC
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
NC
NC
NC
L
NC
Q6
D6
V
DDQ
V
SS
V
SS
V
SS
V
DDQ
NC
NC
Q0
M
NC
NC
NC
V
SS
V
SS
V
SS
V
SS
V
SS
NC
NC
D0
N
NC
D7
NC
V
SS
SA
SA
SA
V
SS
NC
NC
NC
P
NC
NC
Q7
SA
SA
C
SA
SA
NC
D8
Q8
R
TDO
TCK
SA
SA
SA
C
SA
SA
SA
TMS
TDI
PIN NAME
Notes:
1. C, C, K or K cannot be set to V
REF
voltage.
2. When ZQ pin is directly connected to V
DD
output impedance is set to minimum value
and it
cannot be connected to ground or left unconnected
.
3. Not connected to chip pad internally.
SYMBOL
K, K
PIN NUMBERS
6B, 6A
DESCRIPTION
Input Clock
NOTE
C, C
CQ, CQ
Doff
6P, 6R
11A, 1A
1H
Input Clock for Output Data
Output Echo Clock
DLL Disable when low
1
SA
D0-8
Q0-8
3A,9A,4B,8B,5C-7C,5N-7N,4P,5P,7P,8P,3R-5R,7R-9R
11M,11J,10E,11C,2D,2G,3L,2N,10P
11L,10J,11E,11B,3E,3G,2L,3P,11P
Address Inputs
Data Inputs
Data Outputs
W
4A
Write Control Pin,active when low
R
8A
7B
Read Control Pin,active when low
Nybble Write Control Pin,active when low
Input Reference Voltage
Output Driver Impedance Control Input
BW
V
REF
ZQ
2H,10H
11H
2
V
DD
V
DDQ
V
SS
5F,7F,5G,7G,5H,7H,5J,7J,5K,7K
4E,8E,4F,8F,4G,8G,3H,4H,8H,9H,4J,8J,4K,8K,4L,8L
2A,10A,4C,8C,4D-8D,5E-7E,6F,6G,6H,6J,6K,5L-7L,4M-8M,4N,8N
Power Supply ( 1.8 V )
Output Power Supply ( 1.5V or 1.8V )
Ground
TMS
TDI
TCK
10R
11R
2R
JTAG Test Mode Select
JTAG Test Data Input
JTAG Test Clock
TDO
1R
JTAG Test Data Output
NC
7A,5A,1B,2B,3B,5B,9B,10B,1C,2C,3C,9C,10C,1D,3D,9D,10D,11D
1E,2E,9E,1F,2F,3F,9F,10F,11F,1G,9G,10G,11G,1J,2J,3J,9J
1K,2K,3K,10K,11K,9K,1L,9L,10L,1M,2M,3M,9M,10M,1N,3N,9N
10N,11N,1P,2P,9P
No Connect
3
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