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K9F1608W0A-TCB0, K9F1608W0A-TIB0
FLASH MEMORY
10
NAND Flash Technical Notes
(Continued)
Program Flow Chart
Start
SR. 6 = 1
or R/B = 1
Write 00H
SR. 0 = 0
No
*
If ECC is used, this verification
operation is not needed.
Write 80H
Write Address
Write Data
Write 10H
Write 70H
Write Address
Wait for tR Time
Verify Data
No
Program Completed
Program Error
Yes
No
Yes
*
Program Error
Yes
: If program operation results in an error, map out
the block including the page in error and copy the
target data to another block.
*
Error in write or read operation
Over its life time, the additional invalid blocks may occur. Through the tight process control and intensive testing, Samsung mini-
mizes the additional block failure rate, which is projected below 0.1% up until 1million program/erase cycles. Refer to the qualification
report for the actual data.The following possible failure modes should be considered to implement a highly reliable system. In the
case of status read failure after erase or program, block replacement should be done. To improve the efficiency of memory space, it
is recommended that the read or verification failure due to single bit error be reclaimed by ECC without any block replacement. The
said additional block failure rate does not include those reclaimed blocks.
Failure Mode
Detection and Countermeasure sequence
Write
Erase Failure
Status Read after Erase --> Block Replacement
Program Failure
Status Read after Program --> Block Replacement
Read back ( Verify after Program) --> Block Replacement
or ECC Correction
Read
Single Bit Failure
Verify ECC -> ECC Correction
ECC
: Error Correcting Code --> Hamming Code etc.
Example) 1bit correction & 2bit detection