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FLASH MEMORY
13
K9F1G08U0A
K9F1G08Q0A
NAND Flash Technical Notes
Identifying Invalid Block(s)
All device locations are erased(FFh) except locations where the invalid block(s) information is written prior to shipping. The invalid
block(s) status is defined by the 1st byte in the spare area. Samsung makes sure that either the 1st or 2nd page of every invalid
block has non-FFh data at the column address of 2048. Since the invalid block information is also erasable in most cases, it is
impossible to recover the information once it has been erased. Therefore, the system must be able to recognize the invalid block(s)
based on the original invalid block information and create the invalid block table via the following suggested flow chart(Figure 3). Any
intentional erasure of the original invalid block information is prohibited.
Invalid Block(s)
Invalid blocks are defined as blocks that contain one or more invalid bits whose reliability is not guaranteed by Samsung. The infor-
mation regarding the invalid block(s) is so called as the invalid block information. Devices with invalid block(s) have the same quality
level as devices with all valid blocks and have the same AC and DC characteristics. An invalid block(s) does not affect the perfor-
mance of valid block(s) because it is isolated from the bit line and the common source line by a select transistor. The system design
must be able to mask out the invalid block(s) via address mapping. The 1st block, which is placed on 00h block address, is guaran-
teed to be a valid block, does not require Error Correction up to 1K program/erase cycles.
*
Check "FFh" at the column address
of the 1st and 2nd page in the block
2048
Figure 3. Flow chart to create invalid block table.
Start
Set Block Address = 0
Check "FFh
Increment Block Address
Last Block
End
No
Yes
Yes
Create (or update)
Invalid Block(s) Table
No