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參數(shù)資料
| 型號： | K9F2808U0B-DCB0 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 16M x 8 Bit NAND Flash Memory |
| 中文描述： | 1,600 × 8位NAND閃存 |
| 文件頁數(shù)： | 25/29頁 |
| 文件大小： | 304K |
| 代理商： | K9F2808U0B-DCB0 |
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FLASH MEMORY
25
K9F2808U0B-YCB0,YIB0
K9F2808U0B-DCB0,DIB0
K9F2808Q0B-DCB0,DIB0
K9F2808U0B-VCB0,VIB0
PAGE PROGRAM
The device is programmed basically on a page basis, but it allows multiple partial page program of one byte or consecutive bytes up
to 528, in a single page program cycle. The number of consecutive partial page program operation within the same page without
intervening erase operation should not exceed 2 for main array and 3 for spare array. The addressing may be done in any random
order in a block. Page program cycle consists of a serial data loading(up to 528 bytes of data) into the page register, and prog ram of
loaded data into the appropriate cell. Serial data loading can start in 2nd half array by moving pointer. About the pointer operation,
please refer to the attached technical notes. Serial data loading is executed by entering the Serial Data Input command(80h) and
three cycle address input and then serial data loading. The bytes except those to be programmed need not to be loaded. The Page
Program confirm command(10h) initiates the programming process. Writing 10h alone without previously entering 80h will not initiate
program process. The internal write controller automatically executes the algorithms and timings necessary for program and verifica-
tion, thereby freeing the CPU for other tasks. Once the program process starts, the Read Status Register command may be entered,
with RE and CE low, to read the status register. The CPU can detect the completion of a program cycle by monitoring the R/B out-
put, or the Status bit(I/O 6) of the Status Register. Only the Read Status command and Reset command are valid while programming
is in progress. When the Page Program is completed, the Write Status Bit(I/O 0) may be checked(Figure 9). The internal write verifi-
cation detects only errors for "1"s that are not successfully programmed to "0"s. The command register remains in Read Status com-
mand mode until another valid command is written to the command register.
Figure 9 details the sequence.
Figure 9. Program & Read Status Operation
80h
A
0
~ A
7
& A
9
~ A
23
528 Byte Data
I/O
0
~
7
R/B
Address & Data Input
I/O
0
Pass
10h
70h
Fail
t
PROG
Figure 8-1. Sequential Row Read2 Operation (GND Input=Fixed Low)
(only for K9F2808U0B-Y and K9F2808U0B-V, valid within a block)
50h
A
0
~ A
3
& A
9
~ A
24
I/O
0
~
7
R/B
Start Add.(3Cycle)
Data Output
Data Output
Data Output
2nd
Nth
(16Byte)
(16Byte)
Data Field
Spare Field
1st
Block
Nth
(A
4
~ A
7
:
Don
t Care)
1st
t
R
t
R
t
R
≈
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K9F2808U0B-DIB0 | 16M x 8 Bit NAND Flash Memory |
| K9F2808U0M-YIB0 | 16M x 8 Bit NAND Flash Memory |
| K9F2808U0M-YCB0 | 16M x 8 Bit NAND Flash Memory |
| K9F2808U0B-YCB0 | 16M x 8 Bit NAND Flash Memory |
| K9F2808U0C-DIB0 | 16M x 8 Bit , 8M x 16 Bit NAND Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K9F2808U0B-DIB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8 Bit NAND Flash Memory |
| K9F2808U0B-V | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8 Bit NAND Flash Memory |
| K9F2808U0B-VCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8 Bit NAND Flash Memory |
| K9F2808U0B-VIB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8 Bit NAND Flash Memory |
| K9F2808U0B-Y | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8 Bit NAND Flash Memory |
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