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參數資料
| 型號： | K9F5608U0M-YCB0 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32M x 8 Bit NAND Flash Memory |
| 中文描述： | 32M的× 8位NAND閃存 |
| 文件頁數： | 24/26頁 |
| 文件大?。?/td> | 353K |
| 代理商： | K9F5608U0M-YCB0 |
K9F5608U0M-YCB0,K9F5608U0M-YIB0
FLASH MEMORY
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Figure 9. Read ID Operation
CE
CLE
I/O
0
~
7
ALE
RE
WE
90h
00h
ECh
75h
Address. 1cycle
Maker code
Device code
t
CR
t
AR1
t
READID
Figure 10. RESET Operation
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. Refer to table 3 for device status after reset operation. If the device is
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for tRST
after the Reset command is written. Refer to Figure 10 below.
After Power-up
After Reset
Operation Mode
Read 1
Waiting for next command
FFh
I/O
0
~
7
R/B
Table3. Device Status
t
RST
READ ID
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of
00h. Two read cycles sequentially output the manufacture code(ECh), and the device code (75h) respectively. The command register
remains in Read ID mode until further commands are issued to it. Figure 9 shows the operation sequence.
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| K9F5608X0D-FIB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit NAND Flash Memory |
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