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參數(shù)資料
| 型號(hào)： | KBE00G003M-D411 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | NAND 512Mb*2 + Mobile SDRAM 256Mb*2 |
| 中文描述： | NAND閃存的512Mb * 2移動(dòng)SDRAM 256Mb的* 2 |
| 文件頁(yè)數(shù)： | 14/89頁(yè) |
| 文件大?。?/td> | 1238K |
| 代理商： | KBE00G003M-D411 |
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KBE00G003M-D411
MCP MEMORY
July 2005
14
Revision 0.1
CAPACITANCE
(
T
A
=25
°
C, V
CC
=1.8V, f=1.0MHz)
NOTE
: Capacitance is periodically sampled and not 100% tested.
Item
Symbol
Test Condition
Min
Max
Unit
Input/Output Capacitance
C
I/O
V
IL
=0V
-
10
pF
Input Capacitance
C
IN
V
IN
=0V
-
10
pF
VALID BLOCK
NOTE
:
1. The
device
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid blocks is pre-
sented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits
.
Do not erase or program
factory-marked bad blocks. Refer to the attached technical notes for a appropriate management of invalid blocks.
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block, does not require Error Correction up to 1K program/erase
cycles.
3. Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb memory space.
Parameter
Symbol
Min
Typ.
Max
Unit
Valid Block Number
N
VB
4,026
-
4,096
Blocks
AC TEST CONDITION
(TA=-25 to 85
°
C, Vcc=1.65V~1.95V unless otherwise noted)
Parameter
Value
Input Pulse Levels
0V to Vcc
Q
Input Rise and Fall Times
5ns
Input and Output Timing Levels
Vcc
Q
/2
Output Load (Vcc
Q
:1.8V +/-10%)
1 TTL GATE and CL=30pF
MODE SELECTION
NOTE
: 1. X can be V
IL
or V
IH.
2. WP should be biased to CMOS high or CMOS low for standby.
CLE
ALE
CE
WE
RE
WP
Mode
H
L
L
H
X
Read Mode
Command Input
L
H
L
H
X
Address Input(4clock)
H
L
L
H
H
Write Mode
Command Input
L
H
L
H
H
Address Input(4clock)
L
L
L
H
H
Data Input
L
L
L
H
X
Data Output
X
X
X
X
H
X
During Read(Busy)
X
X
X
X
X
H
During Program(Busy)
X
X
X
X
X
H
During Erase(Busy)
X
X
(1)
X
X
X
L
Write Protect
X
X
H
X
X
0V/V
CC
(2)
Stand-by
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|---|---|
| KBE00S009M | 1Gb NAND x 2 + 256Mb Mobile SDRAM x 2 |
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| KBJ2502 | 25A SINGLE PHASE SILICON BRIDGE RECTIFIER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KBE00S003M | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:1Gb NAND*2 + 256Mb Mobile SDRAM*2 |
| KBE00S003M-D411 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:1Gb NAND*2 + 256Mb Mobile SDRAM*2 |
| KBE00S009M | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:1Gb NAND x 2 + 256Mb Mobile SDRAM x 2 |
| KBE00S009M-D411 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:1Gb NAND x 2 + 256Mb Mobile SDRAM x 2 |
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