參數(shù)資料
型號(hào): KFG5616Q1M
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: OneNAND256
中文描述: OneNAND256
文件頁(yè)數(shù): 40/93頁(yè)
文件大?。?/td> 1223K
代理商: KFG5616Q1M
OneNAND256
FLASH MEMORY
40
8.3.2 Warm Reset
Warm reset means that the host resets the device by RP pin, and then the device stops all logic current operation and executes inter-
nal reset operation(Note 1) synchronized with the falling edge of RP and resets current NAND Flash core operation synchronized with
the rising edge of RP. The device logic will not be reset in case RP pulses shorter than 200ns, but the device guarantees the logic
reset operation in case RP pulse is longer than 200ns. NAND Flash core reset will abort current NAND Flash Core operation. The
contents of memory cells being altered are no longer valid as the data will be partially programmed or erased. Warm reset has no
effect on contents of BootRAM and DataRAM.
Figure 6. Warm Reset Timings
RP
Operation or Idle internal reset operation NAND Flash core reset
initiated by RP high
INT
MuxOneNAND
Operation
initiated by RP low
CE, OE
RDY
Idle
High-Z
High-Z
High-Z
Operation or Idle
Operation
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