參數(shù)資料
型號： KH561AM
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 運(yùn)動控制電子
英文描述： Wideband, Low Distortion Driver Amplifier
中文描述： OP-AMP, 5000 uV OFFSET-MAX, CDIP24
封裝： CERAMIC, DIP-24
文件頁數(shù)： 7/13頁
文件大?。?/td> 182K
代理商： KH561AM
KH561
DATA SHEET
REV. 1A February 2001
7
part, relatively constant performance over supply voltage
is achieved. A current sense in the error current leg of
the 10X current mirror feeds back to the bias current
setup providing a current shutdown feature when the
output current approaches 250mA.
Figure 2: Simplified Circuit Diagram
Developing the Performance Equations
The KH561 is intended to provide both a controllable
voltage gain from input to output as well as a controllable
output impedance. It is best to treat these two operations
separately with no load in place. Then, with the no-load
gain and output impedance determined, the gain to the
load will simply be the no-load gain attenuated by the
voltage divider formed by the load and the equivalent
output impedance.
Figure 3 steps through the output impedance develop-
ment using an equivalent model of Figure 2. Offering an
equivalent, non-zero, output impedance into a matched
load allows the KH561 to operate at lower internal volt-
age swings for a given desired swing at the load. This
allows higher voltage swings to be delivered at the load
for a given power supply voltage at lower distortion levels
than an equivalent op amp needing to generate twice the
voltage swing actually desired at the matched load. This
improved distortion is specified and tested over a wide
range as shown in the specification listing.
Get both V
o
and I
o
into terms of just the error current, i
err
,
using:
Figure 3: Output Impedance Derivation
Note that the R
o
expression simplifies considerably if
R
i
= 0. Also note that if the forward current gain were to
go to infinity, the output impedance would go to 0. This
would be the normal op amp topology with a very high
internal gain.
The KH561 achieves a non-zero R
o
by
setting the internal forward gain to be a low, well
controlled, value
.
Developing the No-Load Gain Expression
Taking the output impedance expression as one con-
straint setting the external resistor values, we now need
to develop the no-load voltage gain expression from the
non-inverting input to the output as the other constraint.
Figure 4 shows the derivation of the no load gain.
R
g
R
o
i
err
V
o
R
f
C
x
19
I
o
I
o
I
bias
10X Current Mirror
Current Limit
5pF
Q3
Q1
-V
CC
+V
CC
+V
CC
4
I
bias
10X Current Mirror
Current Limit
5pF
Q4
Q2
-V
CC
21
23
8
V
i
i
err
R
g
R
f
i
f
Gi
err
R
o
V
o
l
o
X1
R
i
V-
+
-
V
i
R and
+
i
i
V
R
i
1
R
R
V
V
i R
i
R
R
1
R
R
V
i
R
R 1
R
R
and
I
Gi
i
i
G 1
err
f
err
g
err
i
g
o
f
err
i
f
i
g
o
err
f
f
g
o
err
f
err
=
=
=
+
=
+
=
+
+
=
+
+
=
+
=
≡
=
+
+
=
0
=
R
R
then
R
V
I
R
R 1
R
R
G 1
R
R
note thatR
R
G 1
R
i
g
o
o
o
f
f
g
i
g
o
f
i
i
err
R
g
R
f
Gi
err
V
o
X1
R
i
V-
+
-
V
i
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