參數(shù)資料
型號: KM416C254DL
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 256K x 16Bit CMOS Dynamic RAM with Extended Data Out(256K x 16位 CMOS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出))
中文描述: 256 × 16位分辨率的CMOS擴展數(shù)據(jù)輸出動態(tài)存儲器(256K × 16位的CMOS動態(tài)隨機存儲器(帶擴展數(shù)據(jù)輸出))
文件頁數(shù): 1/36頁
文件大?。?/td> 777K
代理商: KM416C254DL
KM416C254D/DL, KM416V254D/DL
CMOS DRAM
This is a family of 262,144 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access
of memory cells within the same row. Power supply voltage(+5.0V or +3.3V), Access time (-5,-6 or -7), power consumption(Normal or
Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-
only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 256Kx16 EDO Mode
DRAM family is fabricated using Samsung
s advanced CMOS process to realize high band-width, low power consumption and high reli-
ability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
Part Identification
- KM416C254D/DL (5V, 512 Ref.)
- KM416V254D/DL (3.3V, 512 Ref.)
Extended Data Out Mode operation
2 CAS Byte/Wrod Read/Write operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Self-refresh capability (L-ver only)
TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in 40-pin SOJ 400mil and 44(40)-pin
TSOP(II) 400mil packages
Triple +5V
±
10% power supply (5V product)
Triple +3.3V
±
0.3V power supply (3.3V product)
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Column Decoder
Lower
Data out
Buffer
RAS
UCAS
LCAS
W
Vcc
Vss
DQ0
to
DQ7
Memory Array
262,144 x16
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
256K x 16Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Refresh Cycles
Part
NO.
V
CC
Refresh
cycle
Refresh period
Normal
L-ver
C254D
V254D
5V
3.3V
512
8ms
128ms
Performance Range
Speed
-5
-6
-7
t
RAC
50ns
60ns
70ns
t
CAC
15ns
15ns
20ns
t
RC
84ns
104ns
124ns
t
HPC
20ns
25ns
30ns
Remark
5V only
5V/3.3V
5V/3.3V
Active Power Dissipation
Speed
-5
-6
-7
3.3V(512 Ref.)
-
255
235
5V(512 Ref.)
605
495
440
Unit : mW
S
Upper
Data in
Buffer
Upper
Data out
Buffer
Lower
Data in
Buffer
DQ
8
to
DQ15
OE
A0 ~ A8
相關PDF資料
PDF描述
KM416V254DL 256K x 16Bit CMOS Dynamic RAM with Extended Data Out(256K x 16位 CMOS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出))
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