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參數(shù)資料
| 型號(hào)： | KM48V514D |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512K x 8Bit CMOS Dynamic RAM with Extended Data Out(高速512K x 8位 CMOS 動(dòng)態(tài)RAM(帶擴(kuò)展數(shù)據(jù)輸出)) |
| 中文描述： | 為512k × 8位的CMOS動(dòng)態(tài)隨機(jī)存儲(chǔ)器的擴(kuò)展數(shù)據(jù)輸出（高速為512k × 8位的CMOS動(dòng)態(tài)隨機(jī)存儲(chǔ)器（帶擴(kuò)展數(shù)據(jù)輸出）） |
| 文件頁(yè)數(shù)： | 1/21頁(yè) |
| 文件大小： | 372K |
| 代理商： | KM48V514D |
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KM48C514D, KM48V514D
CMOS DRAM
This is a family of 524,288 x 8 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access
of memory cells within the same row. Power supply voltage(+5.0V or +3.3V), Access time(-5,-6,-7), power consumption(Normal or Low
power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only
refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 512Kx8 EDO Mode DRAM
family is fabricated using Samsung
′
s advanced CMOS process to realize high band-width, low power consumption and high reliability.
It may be used as main memory unit for microcomputer, personal computer and portable machines.
Part Identification
- KM48C514D/DL (5V, 1K Ref.)
- KM48V514D/DL (3.3V, 1K Ref.)
Extended Data Out Mode operation
Byte Read/Write operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Self-refresh capability (L-ver only)
TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in 28-pin SOJ 400mil & TSOP(II) 400mil
packages
Dual +5V
±
10% power supply(5V product)
Dual +3.3V
±
0.3V power supply(3.3V product)
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Column Decoder
RAS
CAS
W
Vcc
Vss
DQ0
to
DQ7
A0 - A9
A0 - A8
Memory Array
524,288 x8
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
512K x 8Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Refresh Cycles
Part
NO.
V
CC
Refresh
cycle
Refresh period
Normal
L-ver
C514D
V514D
5V
3.3V
1K
16ms
128ms
Performance Range
t
RAC
-5
50ns
-6
60ns
-7
70ns
Speed
t
CAC
15ns
15ns
20ns
t
RC
84ns
104ns
124ns
t
HPC
20ns
25ns
30ns
Remark
5V Only
5V/3.3V
5V/3.3V
Active Power Dissipation
Speed
-5
-6
-7
3.3V (1K Ref.)
-
255
235
5V (1K Ref.)
470
385
360
Unit : mW
S
Data out
Buffer
Data in
Buffer
OE
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