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參數(shù)資料
| 型號(hào)： | KM616FR4110 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 256K x 16 Bit Super Low Power and Low Voltage Full CMOS Static RAM(256K x 16位超低功耗低電壓CMOS 靜態(tài)RAM) |
| 中文描述： | 256K × 16位超低功耗和低電壓的CMOS全靜態(tài)RAM（256K × 16位超低功耗低電壓的CMOS靜態(tài)RAM）的 |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 167K |
| 代理商： | KM616FR4110 |
Revision 0.11
June 1998
CMOS SRAM
KM616FR4110 Family
Advance
- 6 -
Address
Data Out
Previous Data Valid
Data Valid
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1)
(Address Controlled
,
CS
1
=OE=V
IL
, CS
2
=WE=V
IH
, UB or/and LB=V
IL
)
TIMING WAVEFORM OF READ CYCLE(2)
(WE=V
IH
)
Data Valid
High-Z
t
RC
CS
1
Address
UB, LB
OE
Data out
t
AA
t
RC
t
OH
t
OH
t
AA
t
CO
t
BA
t
OE
t
OLZ
t
BLZ
t
LZ
t
OHZ
t
BHZ
t
HZ
NOTES
(READ CYCLE)
1.
t
HZ
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
levels.
2. At any given temperature and voltage condition,
t
HZ
(Max.) is less than
t
LZ
(Min.) both for a given device and from device to device
interconnection.
CS
2
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