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參數(shù)資料
| 型號： | KM616S4110C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 256Kx16 Bit Low Power and Low Voltage CMOS Static RAM(256K x 16位低功耗低電壓CMOS 靜態(tài)RAM) |
| 中文描述： | 256Kx16位低功耗和低電壓的CMOS靜態(tài)RAM（256K × 16位低功耗低電壓的CMOS靜態(tài)RAM）的 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 166K |
| 代理商： | KM616S4110C |
KM616S4110C Family
CMOS SRAM
Preliminary
Revision 0.01
August 1998
6
Address
Data Out
Previous Data Valid
Data Valid
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1)
(Address Controlled
,
CS
1
=OE=V
IL
, CS
2
=WE=V
IH
, UB or/and LB=V
IL
)
TIMING WAVEFORM OF READ CYCLE(2)
(WE=V
IH
)
Data Valid
High-Z
t
RC
CS
1
Address
UB, LB
OE
Data out
t
AA
t
RC
t
OH
t
OH
t
AA
t
CO
t
BA
t
OE
t
OLZ
t
BLZ
t
LZ
t
OHZ
t
BHZ
t
HZ
NOTES (
READ CYCLE)
1.
t
HZ
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
levels.
2. At any given temperature and voltage condition,
t
HZ
(Max.) is less than
t
LZ
(Min.) both for a given device and from device to device
interconnection.
CS
2
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| KM616V1002BT-10 | 制造商:SEC 功能描述: |
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