參數(shù)資料
型號(hào)： KM616V1002BI
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 64K x 16 Bit High-Speed CMOS Static RAM(3.3V Operating)(64K x 16 位高速CMOS 靜態(tài) RAM(3.3V 工作))
中文描述： 64K的× 16位高速CMOS靜態(tài)RAM（3.3V的工作）（64K的× 16位高速的CMOS靜態(tài)隨機(jī)存儲(chǔ)器（3.3V的工作））
文件頁(yè)數(shù)： 2/9頁(yè)
文件大小： 158K
代理商： KM616V1002BI
KM616V1002B/BL, KM616V1002BI/BLI
CMOS SRAM
PRELIMINARY
PPreliminary
Rev 2.1
- 2 -
August 1998
PIN FUNCTION
Pin Name
Pin Function
A
0
- A
15
Address Inputs
WE
Write Enable
CS
Chip Select
OE
Output Enable
LB
Lower-byte Control(I/O
1
~I/O
8
)
UB
Upper-byte Control(I/O
9
~I/O
16
)
I/O
1
~ I/O
16
Data Inputs/Outputs
V
CC
Power(+3.3V)
V
SS
Ground
N.C
No Connection
64K x 16 Bit High-Speed CMOS Static RAM(3.3V Operating)
The KM616V1002B is a 1,048,576-bit high-speed Static Ran-
dom Access Memory organized as 65,536 words by 16 bits.
The KM616V1002B uses 16 common input and output lines
and has an output enable pin which operates faster than
address access time at read cycle. Also it allows that lower and
upper byte access by data byte control (UB, LB). The device is
fabricated using SAMSUNG
′
s advanced CMOS process and
designed for high-speed circuit technology. It is particularly well
suited for use in high-density high-speed system applications.
The KM616V1002B is packaged in a 400mil 44-pin plastic SOJ
or TSOP2 forward.
GENERAL DESCRIPTION
FEATURES
Fast Access Time 8,10,12ns(Max.)
Low Power Dissipation
Standby (TTL) : 50mA(Max.)
(CMOS) : 5mA(Max.)
0.7mA(Max.) - L-Ver. only
Operating KM616V1002B/BL - 8 : 200mA(Max.)
KM616V1002B/BL - 10 : 195mA(Max.)
KM616V1002B/BL - 12 : 190mA(Max.)
Single 3.3
±
0.3V Power Supply
TTL Compatible Inputs and Outputs
Fully Static Operation
- No Clock or Refresh required
Three State Outputs
2V Minimum Data Retention ; L-Ver. only
Center Power/Ground Pin Configuration
Data Byte Control : LB : I/O
1
~ I/O
8,
UB : I/O
9
~ I/O
16
Standard Pin Configuration
KM616V1002BJ : 44-SOJ-400
KM616V1002BT : 44-TSOP2-400F
Clk Gen.
I/O
1
~I/O
8
OE
UB
LB
CS
PIN CONFIGURATION
(Top View)
SOJ/
TSOP2
FUNCTIONAL BLOCK DIAGRAM
R
Data
Cont.
Data
Cont.
Column Select
CLK
Gen.
Pre-Charge Circuit
Memory Array
256 Rows
256x16 Columns
I/O Circuit &
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A
15
A
14
A
13
OE
UB
LB
I/O
16
I/O
15
I/O
14
I/O
13
Vss
Vcc
I/O
12
I/O
11
I/O
10
I/O
9
N.C.
A
12
A
11
A
10
A
9
N.C.
A
0
A
1
A
2
A
3
A
4
CS
I/O
1
I/O
2
I/O
3
I/O
4
Vcc
Vss
I/O
5
I/O
6
I/O
7
I/O
8
WE
A
5
A
6
A
7
A
8
N.C.
I/O
9
~I/O
16
WE
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
KM616V1002B/BL -8/10/12
Commercial Temp.
KM616V1002BI/BLI -8/10/12
Industrial Temp.
ORDERING INFORMATION
A
10
A
11
A
12
A
13
A
14
A
15
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
相關(guān)PDF資料
PDF描述
KM616V1002C 64K x 16 Bit High-Speed CMOS Static RAM(3.3V Operating)(64K x 16 位高速CMOS 靜態(tài) RAM(3.3V 工作))
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