參數(shù)資料
型號： KMM366S403CTL
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： PC66 SDRAM MODULE
中文描述： PC66 SDRAM內(nèi)存模塊
文件頁數(shù)： 5/11頁
文件大小： 162K
代理商： KMM366S403CTL
PC66 SDRAM MODULE
KMM366S403CTL
REV. 3 Mar. '98
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
V
IN
, V
OUT
-1.0 ~ 4.6
V
Voltage on V
DD
supply relative to Vss
V
DD
, V
DDQ
-1.0 ~ 4.6
V
Storage temperature
T
STG
-55 ~ +150
°
C
Power dissipation
P
D
16
W
Short circuit current
I
OS
50
mA
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Notes :
DC OPERATING CONDITIONS AND CHARACTERISTICS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= 0 to 70
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
V
DD
3.0
3.3
3.6
V
Input high voltage
V
IH
2.0
3.0
V
DDQ
+0.3
V
1
Input low voltage
V
IL
-0.3
0
0.8
V
2
Output high voltage
V
OH
2.4
-
-
V
I
OH
= -2mA
Output low voltage
V
OL
-
-
0.4
V
I
OL
= 2mA
Input leakage current (Inputs)
I
IL
-16
-
16
uA
3
Input leakage current (I/O pins)
I
IL
-3
-
3
uA
3,4
CAPACITANCE
(V
DD
= 3.3V, T
A
= 23
°
C, f = 1MHz, V
REF
= 1.4V
±
200
mV)
Parameter
Symbol
Min
Max
Unit
Input capacitance (A0 ~ A10/AP, BA0)
Input capacitance (RAS, CAS, WE)
Input capacitance (CKE0 ~ CKE1)
Input capacitance (CLK0 ~ CLK3)
Input capacitance (CS0 ~ CS3)
Input capacitance (DQM0 ~ DQM7)
Data input/output capacitance (DQ0 ~ DQ63)
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
C
IN6
C
OUT
60
60
35
25
25
15
10
90
90
55
35
35
25
20
pF
pF
pF
pF
pF
pF
pF
MAXIMUM TRACE LENGTHS
Signal
Max lengths
Unit
Signal
Max lengths
Unit
A0 ~ A10/AP
BA0
RAS
CAS
WE
8.0
8.0
8.0
8.0
8.0
Inches
Inches
Inches
Inches
Inches
CKE0 ~ CKE1
CS0 ~ CS3
DQM0 ~ DQM7
DQ0 ~ DQ63
5.5
4.0
3.0
2.0
Inches
Inches
Inches
Inches
1. V
IH
(max) = 5.6V AC. The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
IN
≤
V
DDQ.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. Dout is disabled, 0V
≤
V
OUT
≤
V
DDQ.
Notes :
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