- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374363 > KMM372C213CS (SAMSUNG SEMICONDUCTOR CO. LTD.) 2M x 72 DRAM DIMM with ECC using 2Mx8, 2K Refresh, 5V PDF資料下載
參數(shù)資料
| 型號： | KMM372C213CS |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2M x 72 DRAM DIMM with ECC using 2Mx8, 2K Refresh, 5V |
| 中文描述： | 200萬× 72的DRAM內(nèi)存的ECC的使用2Mx8和2K刷新，5V的 |
| 文件頁數(shù)： | 6/19頁 |
| 文件大?。?/td> | 430K |
| 代理商： | KMM372C213CS |
DRAM MODULE
KMM372C213CK/CS
NOTES
An initial pause of 200us is required after power-up followed
by any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
Input voltage levels are Vih/Vil. V
IH
(min) and V
IL
(max) are
reference levels for measuring timing of input signals. Transi-
tion times are measured between V
IH
(min) and V
IL
(max) and
are assumed to be 5ns for all inputs.
Measured with a load equivalent to 2 TTL loads and 100pF.
Operation within the
t
RCD
(max) limit insures that
t
RAC
(max)
can be met.
t
RCD
(max) is specified as a reference point only.
If
t
RCD
is greater than the specified
t
RCD
(max) limit, then
access time is controlled exclusively by
t
CAC
.
Assumes that
t
RCD
≥
t
RCD
(max).
This parameter defines the time at which the output achieves
the open circuit condition and is not referenced to V
OH
or
V
OL
.
t
WCS
is not restrictive operating parameter. It included in the
data sheet as electrical characteristic only. If
t
WCS
≥
t
WCS
(min)
the cycle is an early write cycle and the data out pin will
remain high impedance for the duration of the cycle.
Either
t
RCH
or
t
RRH
must be satisfied for a read cycle.
These parameters are referenced to the CAS leading edge in
early write cycles.
Operation within the
t
RAD
(max) limit insures that
t
RAC
(max)
can be met.
t
RAD
(max) is specified as reference point only. If
t
RAD
is greater than the specified
t
RAD
(max) limit, then
access time is controlled by
t
AA
.
The timing skew from the DRAM to the DIMM resulted from
the addition of buffers.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KMM372C400CK | 4M x 72 DRAM DIMM(4M x 72 動態(tài) RAM模塊) |
| KMM372C400CS | 4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 5V |
| KMM372C410CK | 4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 5V |
| KMM372C410CS | 4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 5V |
| KMM372E410CK | 4Mx72 DRAM DIMM(4Mx72 動態(tài) RAM模塊) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KMM372C400CK | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 5V |
| KMM372C400CS | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 5V |
| KMM372C410CK | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 5V |
| KMM372C410CS | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 5V |
| KMM372C803CK | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 72 DRAM DIMM with ECC using 8Mx8, 4K 8K Refresh, 5V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。