參數(shù)資料
型號(hào): L6740L
廠商: 意法半導(dǎo)體
英文描述: Hybrid controller (4+1) for AMD SVID and PVID processors
中文描述: 混合控制器(4 1對(duì)AMD SVID和PVID)處理器
文件頁(yè)數(shù): 26/44頁(yè)
文件大?。?/td> 657K
代理商: L6740L
Output voltage positioning
L6740L
26/44
(LI). In this case, simply connect a resistor R
LI
to SGND: the resulting voltage drop across
R
LI
will be proportional to the delivered current according to the following relationship:
R
G
In case no additional information about the delivered current is requested, the DROOP pin
can be shorted to SGND.
Note:
Split between R
FB_COMP
and R
FB_DROOP
(
Figure 9
) is useful in custom designs where the
Droop effect is minimum (i.e. <50mV over 100A) to simplify the compensation network
design.
6.4
CORE section - Offset (Optional)
The OS pin allows programming a positive offset (V
OS
) for the CORE Section output voltage
by connecting a resistor R
OS
to SGND. The pin is internally fixed at 1.240V so a current is
programmed by connecting the resistor R
OS
between the pin and SGND: this current is mir-
rored and then properly sunk from the FB pin as shown in
Figure 9
. Output voltage is then
programmed as follow:
Offset resistor can be designed by considering the following relationship (R
FB
is be fixed by
the Droop effect):
Caution:
Offset implementation is optional, in case it is not desired, simply short the pin to SGND.
Note:
In the above formulas, R
FB
has to be considered being the total resistance connected
between FB pin and the regulated voltage.
6.5
NB section - Current reading
L6740L embeds a flexible, fully-differential current sense circuitry for the NB Section that is
able to read across Low-Side MOSFET R
dsON
or across a sense resistor placed in series to
the element. The trans-conductance ratio is issued by the external resistor R
ISEN
placed
outside the chip between NB_ISEN pin and the Low-Side Drain. The current sense circuit
performs sample & hold of the current information. The current that flows from the NB_ISEN
pin is then given by the following equation (See
Figure 10
):
R
ISEN
resistor is typically designed according to the OC Threshold. See
Section 7.4
for
details.
V
DROOP
R
LI
-------------
I
OUT
=
V
CORE
VID
R
FB
I
DROOP
I
OS
(
)
=
R
OS
V
OS
------------------
R
FB
=
I
ISEN
R
R
ISEN
----------------
I
NB
I
DROOP_NB
=
=
相關(guān)PDF資料
PDF描述
L6740LTR Hybrid controller (4+1) for AMD SVID and PVID processors
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L6741TR High current MOSFET driver
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L6741TR 功能描述:功率驅(qū)動(dòng)器IC SnglPphase Dual MOSFET Driver RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類(lèi)型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube
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L6743_08 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:High current MOSFET driver