參數(shù)資料
型號(hào)： L6740L
廠商： 意法半導(dǎo)體
英文描述： Hybrid controller (4+1) for AMD SVID and PVID processors
中文描述： 混合控制器（4 1對(duì)AMD SVID和PVID）處理器
文件頁(yè)數(shù)： 32/44頁(yè)
文件大小： 657K
代理商： L6740L
Output voltage monitoring and protections
L6740L
32/44
–
Permanently sets the PWM of the non-involved section to HiZ while keeping
ENDRV of the non-involved section low in order to realize an HiZ condition of the
non-involved section.
Drives the OSC/ FLT pin high.
Power supply or EN pin cycling is required to restart operations.
–
–
The OV threshold needs to be programmed through the OVP pin. Connecting the OVP pin
to SGND through a resistor R
OVP
, the OVP threshold becomes the voltage present at the
pin. Since the OVP pin sources a constant I
OVP
=11
μ
A current, the programmed voltage
becomes:
OVP
11
μ
A
=>
Filter OVP pin with 100pF(max) to SGND.
7.2
Feedback disconnection
L6740L provides both CORE and NB sections with FB Disconnection protection. This fea-
ture acts in order to stop the device from regulating dangerous voltages in case the remote
sense connections are left floating. The protection is available for both the sections and
operates for both the positive and negative sense.
According to
Figure 13
, the protection works as follow:
CORE Section:
Positive sense is performed monitoring the CORE output voltage through both VSEN
and CS1-. As soon as CS1- is more than 600mV higher than VSEN, the device latches
with all PWMx set to HiZ and ENDRVx set to zero. FLT pin is driven high. A 30
μ
A pull-
down current on the VSEN forces the device to detect this fault condition.
Negative sense is performed monitoring the internal opamp used to recover the SGND
losses by comparing its output and the internal reference generated by the DAC. As
soon as the difference between the output and the input of this opamp is higher than
500mV, the device latches with all PWMx set to HiZ and ENDRVx set to zero. FLT pin is
driven high.
NB Section (SVI Only)
Positive sense is performed sourcing a 50
μ
A current that pulls-up the NB_VSEN pin in
order to force the device to detect an OV condition for the NB Section.
Negative sense is performed monitoring the internal opamp used to recover the SGND
losses by comparing its output and the internal reference generated by the DAC. As
soon as the difference between the output and the input of this opamp is higher than
500mV, the device latches with all PWMx set to HiZ and ENDRVx set to zero. FLT pin is
driven high.
●
●
To recover from a latch condition, cycle VCC or EN.
OVP
TH
R
OVP
11
μ
A
=
R
OVP
-------------------
=
相關(guān)PDF資料
PDF描述
L6740LTR Hybrid controller (4+1) for AMD SVID and PVID processors
L6741 High current MOSFET driver
L6741TR High current MOSFET driver
L6743 High current MOSFET driver
L6743Q High current MOSFET driver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
L6740LTR 功能描述:DC/DC 開(kāi)關(guān)控制器 Hybrid controller RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開(kāi)關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
L6741 功能描述:功率驅(qū)動(dòng)器IC SnglPphase Dual MOSFET Driver RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube
L6741TR 功能描述:功率驅(qū)動(dòng)器IC SnglPphase Dual MOSFET Driver RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube
L6743 功能描述:功率驅(qū)動(dòng)器IC SnglPphase Dual MOSFET Driver RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube
L6743_08 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:High current MOSFET driver
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