參數(shù)資料
型號(hào): L6740LTR
廠商: 意法半導(dǎo)體
英文描述: Hybrid controller (4+1) for AMD SVID and PVID processors
中文描述: 混合控制器(4 1對(duì)AMD SVID和PVID)處理器
文件頁(yè)數(shù): 8/44頁(yè)
文件大小: 657K
代理商: L6740LTR
Pins description and connection diagrams
L6740L
8/44
2
Pins description and connection diagrams
Figure 5.
Pins connection (Top View)
2.1
Pin descriptions
48
47
46
45
44
43
42
41
40
39
38
37
13
14
15
16
17
18
19
20
21
22
23
24
36 35 34 33 32 31 30 29 28 27 26 25
1
2
3
4
5
6
7
8
9
10 11 12
CS1+
CS1-
CS2+
CS2-
CS3+
CS3-
CS4+
CS4-
OC_PHASE
N.C.
NB_ISEN
N.C.
PWM1
PWM2
PWM3
PWM4
NB_PWM
ENDRV
NB_ENDRV
PWRGOOD
SVD
SVC
EN
PWROK
V
V
N
N
N
N
N
N
O
O
V
V
V
G
C
F
D
V
F
O
L
O
L
P
L6740L
Table 2.
Pin description
Pin#
Name
Function
1
VCC
Device power supply.
Operative voltage is 12V ±15%. Filter with 1
μ
F MLCC to SGND.
2
SGND
All the internal references are referred to this pin. Connect to the PCB
Signal Ground.
3
C
COMP
Error amplifier output.
Connect with an R
F
- C
F
to FB. The CORE section or the device cannot
be disabled by grounding this pin.
4
FB
Error amplifier inverting input.
Connect with a resistor R
FB
to VSEN and with an R
F
- C
F
to COMP. Off-
set current programmed by OS is sunk through this pin.
5
DROOP
A current proportional to the total current read is sourced from this pin
according to the Current Reading Gain.
Short to FB to implement Droop Function, if not used, short to SGND.
6
VSEN
Output voltage monitor.
It manages OVP and UVP protections and PWRGOOD. Connect to the
positive side of the load for remote sensing. See
Section 7
for details.
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