參數(shù)資料
型號(hào): L6919ETR
廠商: 意法半導(dǎo)體
英文描述: 5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER WITH DYNAMIC VID MANAGEMENT
中文描述: 5位可編程雙相與動(dòng)態(tài)VID管理控制器
文件頁(yè)數(shù): 18/33頁(yè)
文件大?。?/td> 606K
代理商: L6919ETR
L6919E
18/33
Figure 12. Inductor ripple current vs V
OUT
MAIN CONTROL LOOP
The control loop is composed by the Current Sharing control loop and the Average Current Mode control loop.
Each loop gives, with a proper gain, the correction to the PWM in order to minimize the error in its regulation:
the Current Sharing control loop equalize the currents in the inductors while the Average Current Mode control
loop fixes the output voltage equal to the reference programmed by VID. Figure 13 reports the block diagram of
the main control loop.
Figure 13. Main Control Loop Diagram
Current Sharing (CS) Control Loop
Active current sharing is implemented using the information from Tran conductance differential amplifier in an
average current mode control scheme. A current reference equal to the average of the read current (I
AVG
) is in-
ternally built; the error between the read current and this reference is converted to a voltage with a proper gain
and it is used to adjust the duty cycle whose dominant value is set by the error amplifier at COMP pin (See fig. 14).
The current sharing control is a high bandwidth control loop allowing current sharing even during load transients.
The current sharing error is affected by the choice of external components; choose precise Rg resistor (±1% is
0
1
2
3
4
5
6
7
8
9
0.5
1.5
2.5
3.5
Output Voltage [V]
I
L=3
H,
Vin=12V
L=2
μ
H,
Vin=12V
L=1.5
μ
H, Vin=12V
μ
H,
L=2
L=1.5
μ
H,
Vin=5V
L=3
μ
H, Vin=5V
L1
L2
+
+
PWM1
1/5
+
-
1/5
I
INFO2
I
INFO1
4/5
Z
F(S)
PWM2
C
O
FB
COMP
R
O
ERROR
AMPLIFIER
REFERENCE
PROGRAMMED
BY VID
CURRENT
SHARING
DUTY CYCLE
CORRECTION
R
FB
D02IN1392
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