參數(shù)資料
型號: L7554
廠商: Lineage Power
英文描述: Low-Power SLIC(低功耗用戶線接口(SLIC))
中文描述: 低功耗用戶接口(低功耗用戶線接口電路(SLIC))
文件頁數(shù): 8/28頁
文件大?。?/td> 476K
代理商: L7554
8
Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Electrical Characteristics
(continued)
Table 5. 2-Wire Port
1. The longitudinal current is independent of dc loop current.
2. Current-limit I
LIM
is programmed by a resistor, R
PROG
, from pin I
PROG
to DCOUT. I
LIM
is specified at the loop resistance where current limiting
begins (see Figure 25). Select R
PROG
(k
) = 1.67 x I
LIM
(mA).
3. IEEEis a registered trademark of The Institute of Electrical and Electronics Engineers, Inc.
4. Longitudinal balance of circuit card will depend on loop series resistance matching (see Figures 23 and 24).
5. This parameter is not tested in production. It is guaranteed by design and device characterization.
Parameter
Min
Typ
Max
Unit
Tip or Ring Drive Current
= dc + Longitudinal + Signal Currents
65
mA
Signal Current
15
mArms
Longitudinal Current Capability per Wire
1
8.5
15
mArms
dc Loop Current Limit
2
R
LOOP
= 100
Programmability Range
Accuracy (20 mA < I
LIM
< 40 mA)
5
I
LIM
45
±
12
mA
mA
%
Powerup Open Loop Voltage Levels
Common-mode Voltage
Differential Voltage:
V
BAT
= –48 V, Temperature = 25
°
C
V
BAT
= –72 V, Temperature = 85
°
C (L7554BP)
Disconnect State
PT Resistance (V
BAT
< V
PT
< 0 V)
PR Resistance (V
BAT
< V
PR
< 0 V)
|V
BAT
+ 7.0|
|V
BAT
+ 10.0|
V
BAT
/2
|V
BAT
+ 6.5|
|V
BAT
+ 6.8|
|V
BAT
+ 6.0|
V
V
V
100
100
143
133
k
k
Ground Start State
PT Resistance
100
143
k
dc Feed Resistance (for I
LOOP
below regulation level)
90
113
133
Loop Resistance Range (–3.17 dBm overload into
600
; not including protection)
I
LOOP
= 20 mA at V
BAT
= –48 V
I
LOOP
= 20 mA at V
BAT
= –24 V
1900
700
Longitudinal to Metallic Balance—IEEE
3
Std. 455
(See Figure 7.)
4
50 Hz to 1 kHz
1 kHz to 3 kHz
64
60
75
70
dB
dB
Metallic to Longitudinal Balance
200 Hz to 4 kHz
46
dB
RFI Rejection (See Figure 8.)
5
0.5 Vrms, 50
Source, 30% AM Mod. 1 kHz
500 kHz to 100 MHz
–55
–45
dBV
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