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Lucent Technologies Inc.
3
Data Sheet
November 1999
L7582 Tip Ring Access Switch
Pin Information
(continued)
Table 1. Pin Descriptions
DIP SOG Symbol
1
1
Description
DIP
16
SOG
16
Symbol
V
BAT
Description
F
GND
Fault ground.
Battery voltage. Used as a ref-
erence for protection circuit.
Connect to RING on SLIC side.
Connect to RING on line side.
R
RINGING
Connect to ringing generator.
2
3
4
2
3
4
T
BAT
T
LINE
T
RINGING
Connect to return ground for ring-
ing generator.
T
ACCESS
Test access.
V
DD
5 V supply.
Connect to TIP on SLIC side.
Connect to TIP on line side.
15
14
13
15
14
13
R
BAT
R
LINE
5
6
5
6
12
11
12
11
R
ACCESS
Test access.
LATCH
Data latch control, active-high,
transparent low.
IN
RING
Logic level input switch control.
7
7
T
SD
Temperature shutdown pin. Can
be used as a logic level input or
output. See Table 13, Truth Table,
and the Switching Behavior sec-
tion of this data sheet for input pin
description. As an output, will
read 5 V when device is in its
operational mode and 0 V in the
thermal shutdown mode. To dis-
able the thermal shutdown mech-
anism, tie this pin to 5 V (
not
recommended).
Digital ground.
10
10
8
8
D
GND
9
9
IN
ACCESS
Logic level input switch control.
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings
can cause permanent damage to the device. These are
absolute stress ratings only. Functional operation of the
device is not implied at these or any other conditions in
excess of those given in the operational sections of the
data sheet. Exposure to absolute maximum ratings for
extended periods can adversely affect device reliability.
Table 2. Absolute Maximum Ratings Parameters
Handling Precautions
Although protection circuitry has been designed into
this device, proper precautions should be taken to
avoid exposure to electrostatic discharge (ESD) during
handling and mounting. Lucent Technologies Micro-
electronics Group employs a human-body model
(HBM) and a charged-device model (CDM) for ESD-
susceptibility testing and protection design evaluation.
ESD voltage thresholds are dependent on the circuit
parameters used to define the model. No industry-wide
standard has been adopted for CDM. However, a stan-
dard HBM (resistance = 1500
, capacitance = 100 pF)
is widely used and therefore can be used for compari-
son purposes. The HBM ESD threshold presented
here was obtained by using these circuit parameters.
Table 3. HBM ESD Threshold Voltage
Parameter
Min
–40
–40
5
—
Max
110
150
95
260
Unit
°
C
°
C
%
°
C
Operating Temperature Range
Storage Temperature Range
Relative Humidity Range
Pin Soldering Temperature (t =
10 s max)
5 V Power Supply
Battery Supply
Logic Input Voltage
Input-to-output Isolation
Pole-to-pole Isolation
—
—
—
—
—
7
V
V
V
V
V
–85
7
330
330
Device
L7582
Rating
1000 V