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30
Lucent Technologies Inc.
Advance Data Sheet
March 1997
Relay, and Protector (SRP) for Short Loop and TA-909 Applications
L7597 Resistive Subscriber Line Interface Circuit (SLIC), Ring
ac Design
(continued)
Design Equations
(continued)
12-3426(F).r3
Figure 12. Revised ac Interface C
T
and C
R
Combined into a Single Capacitor C
S
XMT
R
T2
C
T
IRP
C
R
V
FRO
R
RV2
XMT
R
T2
IRP
C
S
= C
T
+ C
R
V
FRO
R
RV2
R
RV1
R
RV1
—
Using the circuit of Figure 11, the ratio of capacitors C
T
and C
R
will affect the gain flatness (transmit and
receive), and to a lesser degree the return loss of the
line circuit. Thus, depending on the requirements, C
T
and C
R
may need to be tight tolerance capacitors.
If this is the case, capacitors C
T
and C
R
may be com-
bined into a single capacitor with a looser tolerance.
This is illustrated in Figure 12.
To scale C
S
(higher), increase C
T
(and decrease R
T2
)
by increasing the R
GX1
/ (R
GX1
+ R
T1
) ratio by rearrang-
ing the circuit in Figure 11 and by adding resistor R
SC
from XMT to IRP as shown below:
12-3427(F)
Figure 13. Addition of Resistor R
SC
from XMT to IRP
Then,
Once the gains and complex termination are set, if the
hybrid balance network is identical to the termination
impedance, then the hybrid balance is set by a single
resistor (shown in Figure 11) and is computed as fol-
lows:
The L7597 SLIC is ground referenced. However, a +5 V
only codec, such as T7504, is referenced to +2.5 V. The
L7597 SLIC has sufficient dynamic range to accommo-
date an ac signal from the codec that is referenced to
+2.5 V without clipping distortion. Furthermore, a dc
current will flow between the L7597 SLIC and +5 V only
codec. With the L7597 SLIC, this current will not affect
ac performance, but it does waste power. To avoid
wasted power consumption, blocking capacitors can be
added. Capacitors should be placed to block any path
from any low-impedance +2.5 V biased node on the
T7504 codec (or other +5 V only codec) to the SLIC. A
blocking capacitor (C
B
) has been added in the applica-
tion drawing in Figure 13.
After the blocking capacitor C
B
is added, the above
component values may have to be adjusted slightly to
optimize performance.
The effects of the blocking capacitor are best evaluated
and optimized by circuit simulation. Contact your
Lucent Technologies Microelectronics Group Account
Representative for information on availability of a
PSPICE* model.
*PSPICEis a registered trademark of MicroSim Corporation.
R
T1
R
SC
IRP
C
T
R
T2
XMT
VRN
R
GX1
C
B
GX1
R
GX1
R
T1
+
-------R
------------------------------------
)
600
---1
1
′
---------
–
RV1
+
R
RV1
R
SC
-------R
+
=
R
HB
GX
×
K
TX
K
RCV
---------R
=