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參數資料
| 型號： | L8560 |
| 廠商： | Lineage Power |
| 英文描述： | Low-Power SLIC（electronic subscriber loop interface circuits ） with Ringing(帶振鈴的低功耗用戶線接口（SLIC）) |
| 中文描述： | 低功耗用戶接口（電子用戶環(huán)路接口電路）與振鈴（帶振鈴的低功耗用戶線接口電路（SLIC）） |
| 文件頁數： | 33/46頁 |
| 文件大?。?/td> | 1060K |
| 代理商： | L8560 |
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Lucent Technologies Inc.
33
Data Sheet
April 2000
L8560 Low-Power SLIC with Ringing
Applications
(continued)
Design Considerations
Unbalanced Bused Ring Signal Application
The L8560 SLIC can also be used in the standard bat-
tery-backed, unbalanced ringing application. In this
case, the ring signal is generated by a central ring gen-
erator and is bused to individual tip/ring pairs. A ringing
relay is used during ringing to disconnect the SLIC
from, and apply the ring generator to, the tip and ring
pair.
Ring Trip Detection
The ring trip circuit is a comparator that has a special
input section optimized for this application. The equiva-
lent circuit is shown in Figure 34, along with its use
in an application using unbalanced, battery-backed
ringing.
12-3014.c (F)
Figure 34. Ring Trip Equivalent Circuit and
Equivalent Application
The comparator input voltage compliance is V
CC
to
V
BAT
, and the maximum current is 240
μ
A in either
direction. Its application is straightforward. A resistance
(R
TSN
+ R
TS2
) in series with the R
TSN
input establishes a
current that is repeated in the R
TSP
input. A slightly
lower resistance (R
TSP
) is placed in series with the R
TSP
input. When ringing is being injected, no dc current
flows through R
TS1
, so the R
TSP
input is at a lower
potential than R
TSN
. When enough dc loop current
flows, the R
TSP
input voltage increases to trip the com-
parator. In Figure 34, a low-pass filter with a double
pole at 2 Hz was implemented to prevent false ring trip.
The following example illustrates how the detection cir-
cuit in Figure 34 will trip at a 12.5 mA dc loop current
using a –48 V battery.
The current I
N
is repeated as I
P
in the positive compar-
ator input. The voltage at comparator input R
TSP
is:
V
RTSP
= V
BAT
+ I
LOOP(dc)
x R
TS1
+ I
P
x R
TSP
Using this equation and the values in the example, the
voltage at input R
TSP
is –13.2 V during ringing injection
(I
LOOP(dc)
= 0). Input R
TSP
is therefore at a level of 5 V
below R
TSN
. When enough dc loop current flows
through R
TS1
to raise its dc drop to 5 V, the comparator
will trip.
In this example:
I
LOOP(dc)
=
= 12.5 mA
Except for L8560CAU, the internal voltage for
L8560CAU is –5.7 V.
Note that during ringing in this mode of operation, both
the NLC and NRDET circuits are active. During the
actual ringing, NRDET is connected and NLC is iso-
lated from tip and ring by the ring relay; thus, NSTAT
reflects the status at NRDET. During quiet intervals of
ringing, NLC is connected and NRDET is isolated from
tip and ring by the ring relay; thus, NSTAT reflects the
status at NLC. Thus, during ring cadence, the logic
input that drives the ring relay can be used as an indi-
cation as to whether NRDET or NLC appears at output
NSTAT.
A basic loop start reference circuit, using bused
ringing with the L8560 SLIC and T7504 first-generation
codec, is shown in Figure 35. This circuit is designed
for a 600
resistive termination impedance and hybrid
balance. Transmit and receive gains are both set at
0 dB.
+
–
R
TSP
R
LOOP
15 k
8.2 V
I
P
= I
N
R
TSN
R
TS2
2 M
2 M
C
RTS1
0.022
μ
F
C
RTS2
0.27
μ
F
274 k
PHONE
HOOK SWITCH
RC PHONE
V
RING
V
BAT
NRDET
R
TS1
402
R
TSP
I
N
R
TSN
–
+
I
N
2.289 M
–8.2 V – (–48)
=
17.4 μA
=
402
---5 V
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