參數(shù)資料
型號(hào)： LTC1402I
廠商： Linear Technology Corporation
英文描述： 10-Bit Bus-Interface D-Type Latches With 3-State Outputs 24-PDIP 0 to 70
中文描述： 串行12位，2.2Msps采樣ADC，帶有關(guān)斷
文件頁數(shù)： 13/20頁
文件大?。?/td> 251K
代理商： LTC1402I
13
LTC1402
APPLICATIO
S I
N
FOR
ATIO
U
W
U
FULL-SCALE AND OFFSET ADJUSTMENT
Figure 8 shows the ideal input/output characteristics for
the LTC1402 in bipolar mode and unipolar mode. Figure 9a
shows the components required for full-scale error ad-
justment. Figure 9b includes the components for offset
and full-scale adjustment.
Adjustment in Bipolar Mode with Pin 8 Held High
The code transitions occur midway between successive
integer LSB values (i.e., –FS + 0.5LSB, –FS + 1.5LSB, –FS
+ 2.5LSB,...FS – 2.5LSB, FS – 1.5LSB). The output at D
OUT
is two’s complement binary with 1LSB = FS – (–FS)/4096
= 4.096V/4096 = 1.0mV. In applications where absolute
accuracy is important, offset and full-scale errors can be
adjusted to zero. Offset error must be adjusted before full-
scale error. In Figure 9b, zero offset is achieved by adjust-
ing the offset applied to the A
IN–
input. For zero offset
error, apply –0.5mV (i.e., –0.5LSB) to A
IN+
and adjust the
offset at the A
IN–
input using R8 until the output code
flickers between 0000 0000 0000 and 1111 1111 1111.
For full-scale adjustment in Figures 9a and 9b, apply an
input voltage of 2.0465V (FS – 1.5LSB) to A
IN+
and adjust
R5 until the output code flickers between 0111 1111 1110
and 0111 1111 1111.
Adjustment in Unipolar Mode with Pin 8 Held Low
The code transitions occur midway between successive
integer LSB values (i.e., –FS + 0.5LSB, –FS + 1.5LSB,
–FS + 2.5LSB,...FS – 2.5LSB, FS – 1.5LSB). The output at
Figure 8. LTC1402 Transfer Characteristic
Figure 9a. Full-Scale Adjustment Circuit with
±
10LSB Range
Figure 7. CMRR vs Input Frequency
FREQUENCY (MHz)
–40
A
–30
–20
–10
0
0.1
10
100
1000
1402 F07
–50
–60
–70
1
INPUT VOLTAGE (V)
1402 F08
011...111
011...110
011...101
100...000
100...001
100...010
111...111
111...110
111...101
000...000
000...001
000...010
FS – 1LSB
–(FS – 1LSB)
64k
R1
51
R3
51
64k
REFERENCE
AMP
S/H
10
μ
F
R4
470k
R2
39k
R5
500
GAIN
V
REF
BANGAP
REFERENCE
5
ANALOG INPUT
0V TO 4.096V
OR
±
2.048V
7
A
IN–
4
A
IN+
3
AGND2
6
LTC1402
2.048V
1402 F09a
Figure 9b. Offset and Full-Scale Adjustment
Circuits with
±
10LSB Range
64k
R1
51
R3
51
64k
REFERENCE
AMP
S/H
10
μ
F
R4
470k
R2
24k
R7
7.5k
R5
500
GAIN
V
REF
BANGAP
REFERENCE
5
5V
5V
ANALOG INPUT
0V TO 4.096V
OR
±
2.048V
OFFSET
ADJ
FULL-SCALE
ADJ
7
A
IN–
4
A
IN+
3
AGND2
6
LTC1402
2.048V
1402 F09b
R8
10k
R6
24k
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