參數(shù)資料
型號(hào)： M38C37E6MXXXFS
廠商： Mitsubishi Electric Corporation
元件分類(lèi)： Codec
英文描述： Replaced by TLV320AIC14K : Low-Power Mono Voice Band CODEC 30-TSSOP -40 to 85
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 25/62頁(yè)
文件大小： 881K
代理商： M38C37E6MXXXFS
25
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C3 Group
[Serial I/O Control Registers 1, 2 (SIOCON1,
SIOCON2)] 0019
16
, 001A
16
Each of the serial I/O control registers 1, 2 contains 8 bits that select
various control parameters of serial I/O.
G
Operation in serial I/O mode
Either an internal clock or an external clock can be selected as the
synchronous clock for serial I/O transfer. A dedicated divider is built-
in as the internal clock, giving a choice of six clocks.
When internal clock is selected, serial I/O starts to transfer by a write
signal to the serial I/O register (address 001B
16
). After 8 bits have
been transferred, the S
OUT
pin goes to high impedance.
When external clock is selected, the clock must be controlled exter-
nally because the contents of the serial I/O register continue to shift
while the transfer clock is input. In this case, the S
OUT
pin does not
go to high impedance at the completion of data transfer.
The interrupt request bit is set at the end of the transfer of 8 bits,
regardless of whether the internal or external clock is selected.
Fig. 23 Structure of serial I/O control register
Fig. 24 Serial I/O timing (for LSB first)
Serial I/O control register 1
(SIOCON1 : address 0019
16
)
Internal synchronous clock selection bits
b2 b1 b0
0 0 0 : f(X
IN
)/8 or f(X
CIN
)/8
0 0 1 : f(X
IN
)/16 or f(X
CIN
)/16
0 1 0 : f(X
IN
)32 or f(X
CIN
)/32
0 1 1 : f(X
IN
)/64 or f(X
CIN
)/64
1 1 0 : f(X
IN
)/128 or f(X
CIN
)/128
1 1 1 : f(X
)/256 or f(X
)/256
Serial I/O port selection bit (P4
0
, P4
5
, P4
6
)
0 : I/O port
1 : S
OUT
, S
CLK1
, S
CLK2
signal pin
S
output selection bit (P4
7
)
0 : I/O port
1 : S
signal pin
Transfer direction selection bit
0 : LSB first
1 : MSB first
Synchronous clock selection bit
0 : External clock
1 : Internal clock
P-channel output disable bit (P4
0
, P4
5
, P4
6
)
0 : CMOS output (in output mode)
1 : N-channel open-drain (in output mode)
b7 b0
Serial I/O control register 2
(SIOCON2: address 001A
)
Synchronous clock output pin selection bit
0 : S
CLK1
1 : S
CLK2
Not used (returns “0” when read)
b7 b0
Interrupt request bit set
Synchronous clock
Transfer clock
Serial I/O register
write signal
Serial I/O output
S
OUT
Serial I/O input
S
IN
Receive enable signal
S
RDY
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
Note:
When internal clock is selected, the S
OUT
pin goes to high impedance after
transfer ends.
(Note)
相關(guān)PDF資料
PDF描述
M38C37E7MXXXFP Replaced by TLV320AIC14K : Low-Power Mono Voice Band CODEC 30-TSSOP -40 to 85
M38C37E7MXXXFS Low-Power Mono Voice Band CODEC 30-TSSOP -40 to 85
M38C37E8MXXXFP Low-Power Mono Voice Band CODEC 30-TSSOP -40 to 85
M38C37E8MXXXFS Low-Power Mono Voice Band CODEC 30-TSSOP -40 to 85
M38C37E9MXXXFP Replaced by TLV320AIC14K : LOW-POWER MONO VOICE BAND CODEC 30-TSSOP 0 TO 70
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