參數(shù)資料
型號(hào): 74ACT399SJ
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 通用總線功能
英文描述: 12-Bit GTL-/GTL/GTL+ To LVTTL Translator 28-TSSOP -40 to 85
中文描述: ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16
封裝: 5.30 MM, EIAJ TYPE2, SOP-16
文件頁(yè)數(shù): 5/8頁(yè)
文件大?。?/td> 87K
代理商: 74ACT399SJ
5
www.fairchildsemi.com
7
AC Operating Requirements for AC
Note 8:
Voltage Range 5.0 is 5.0V
±
0.5V
AC Electrical Characteristics for ACT
Note 9:
Voltage Range 5.0 is 5.0V
±
0.5V
AC Operating Requirements for ACT
Note 10:
Voltage Range 5.0 is 5.0V
±
0.5V
Capacitance
V
CC
T
A
=
+
25
°
C
C
L
=
50 pF
Typ
2.0
1.5
T
A
=
40
°
C to
+
85
°
C
C
L
=
50 pF
Guaranteed Minimum
Symbol
Parameter
(V)
Units
(Note 8)
3.3
5.0
t
S
Setup Time, HIGH or LOW
I
n
to CP
Hold Time, HIGH or LOW
I
n
to CP
Setup Time, HIGH or LOW
4.0
3.0
4.0
3.0
ns
t
H
3.3
5.0
3.3
0.5
0.5
3.5
1.0
1.0
5.5
1.0
1.0
5.5
ns
t
S
ns
S to CP
Hold Time, HIGH or LOW
S to CP
5.0
3.3
5.0
2.0
0.5
0.5
4.0
1.0
1.0
4.0
1.0
1.0
t
H
ns
t
W
CP Pulse Width,
HIGH or LOW
3.3
5.0
3.0
2.0
4.5
3.5
4.5
3.5
ns
V
CC
T
A
=
+
25
°
C
V
CC
=
+
5.0V
C
L
=
50 pF
Typ
180
T
A
=
40
°
C to
+
85
°
C
V
CC
=
5.0V
C
L
=
50pF
Min
160
Symbol
Parameter
(V)
Units
(Note 9)
Min
165
Max
Max
f
MAX
t
PLH
Input Clock Frequency
5.0
MHz
Propagation Delay
CP to Q
Propagation Delay
5.0
1.5
7.0
8.0
1.5
8.5
ns
t
PHL
5.0
2.0
6.0
9.0
2.0
9.5
ns
CP to Q
V
CC
T
A
=
+
25
°
C
C
L
=
50 pF
T
A
=
40
°
C to
+
85
°
C
C
L
=
50 pF
Guaranteed Minimum
2.5
Symbol
Parameter
(V)
Units
(Note 10)
5.0
Typ
0.8
t
S
Setup Time, HIGH or LOW
I
n
to CP
Hold Time, HIGH or LOW
2.5
ns
t
H
5.0
0
1.0
1.0
ns
I
n
to CP
Setup Time, HIGH or LOW
S to CP
t
S
5.0
0.8
4.0
4.0
ns
t
H
Hold Time, HIGH or LOW
S to CP
CP Pulse Width,
5.0
1.0
0.5
0.5
ns
t
W
5.0
1.7
3.5
3.5
ns
HIGH or LOW
Symbol
Parameter
Typ
Units
Conditions
C
IN
C
PD
Input Capacitance
4.5
pF
V
CC
=
OPEN
V
CC
=
5.0V
Power Dissipation Capacitance
30
pF
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