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參數(shù)資料
| 型號(hào)： | M54HC09 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Quad 2-Input AND Gate(四2輸入與門(開漏極)) |
| 中文描述： | 四2輸入與門（四2輸入與門（開漏極）） |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大?。?/td> | 232K |
| 代理商： | M54HC09 |
M54HC09
M74HC09
October 1992
QUAD 2-INPUT AND GATE (OPEN DRAIN)
B1R
(Plastic Package)
ORDER CODES :
M54HC09F1R
M74HC09B1R
M74HC09M1R
M74HC09C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
.
HIGH SPEED
t
PD
= 6 ns (TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 1
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
I
OH
= I
OL
= 4 mA(MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS09
The M54/74HC09 is a high speedCMOS QUAD2-
INPUT OPEN DRAIN AND GATE fabricated insili-
con gate C
2
MOS technology. It has the same high
speed performance of LSTTL combined with true
CMOS low powerconsumption.
The internal circuit is composed of 3 stages includ-
ing buffer output, which gives high noise immunity
and stable output.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
DESCRIPTION
1/9
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