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PowerPC 1xx, 6xx and 7xx Part Number Key
100, 600, or 700
Series Device Number
(106, 107, 603, 740, 745,
750, 755)
MPC
750
A
RX
200
L
H
Product Code
PPC Sample
XPC XC qualified
MPC Qualified
Part/Module Modifier
A
Alpha (original)
B
DGO process
E
603 Enhanced Performance
P
Enhanced & Lower Voltage
R
603e in HiP3 process
C
2:1 (106 only)
D
5:2 (106 only)
L
Full spec all modes
Frequency
2-3 digits
Application Modifier
Bus Ratio
R105
°
T
ext. temp. (-40
° to 105°)
-or-
Application Relief
Revision
Package
FE
CQFP
RX CBGA w/o lid
PX PBGA w/o lid
PowerPC 750 microprocessor. PowerPC 750/740 microprocessors contain separate memory management units
(MMUs) for instructions and data, supporting 4 Petabytes (252) of virtual memory and 4 Gigabytes (232) of physical
memory. Access privileges and memory protection are controlled on block or page granularities. Large, 128-entry
translation lookaside buffers (TLBs) provide efficient physical address translation and support for demand virtual-
memory management on both page- and variable-sized blocks.
Flexible Bus Interface
PowerPC 750/740 microprocessors have a 64-bit data bus and a 32-bit address bus. Support is included for burst, split
and pipelined transactions. The interface provides snooping for data cache coherency. Both microprocessors maintain
MEI coherency protocol in hardware, allowing access to system memory for additional caching bus masters, such as
DMA devices.
CPU Speeds – Internal
200, 233 and 266 MHz
CPU Bus Dividers
PowerPC 740
200-266 MHz
300 and 333 MHz
x3, x3.5, x4, x4.5, x5, x5.5,
x6, x6.5, x7, x7.5, x8
x3, x3.5, x4, x4.5, x5, x5.5,
x6, x6.5, x7, x7.5, x8
PowerPC 740
300-333 MHz
300, 333, 366 and 400 MHz
Bus Interface
64 bits
Instructions per Clock
3 (2 + Branch)
L2 Cache
——
256, 512 Kbyte
1 Mbyte
Typical/Maximum
Power Dissipation
5.7W/7.9W @ 266 MHz
4.2W/6.0W @ 333 MHz
5.8W/8.0W @ 400 MHz
Die Size
67 mm2
Package
255 CBGA
Process
0.29
5LM CMOS
0.25
5LM CMOS
0.25
5LM CMOS
Voltage
3.3V i/o, 2.6V internal
3.3V i/o, 1.9V internal
SPECint95 (estimated)
11.5 @ 266 MHz
14.4 @ 333 MHz
18.8 @ 400 MHz
SPECfp95 (estimated)
6.9 @ 266 MHz
8.7 @ 333 MHz
12.2 @ 400 MHz
Other Performance
488 MIPS @ 266 MHz
610 MIPS @ 333 MHz
733 MIPS @ 400 MHz
Execution Units
Integer, Floating-Point, Branch,
Load/Store, System Register
Integer, Floating-Point, Branch,
Load/Store, System Register
Integer, Floating-Point, Branch,
Load/Store, System Register
x3, x3.5, x4, x4.5, x5, x5.5,
x6, x6.5, x7, x7.5, x8
PowerPC 750
300-400 MHz
200, 233 and 266 MHz
64 bits
3 (2 + Branch)
256, 512 Kbyte
1 Mbyte
L1 Cache
32-Kbyte instruction
32-Kbyte data
32-Kbyte instruction
32-Kbyte data
32-Kbyte instruction
32-Kbyte data
32-Kbyte instruction
32-Kbyte data
5.7W/7.9W @ 266 MHz
67 mm2
Core-to-L2 Frequency
—
1:1, 1.5:1, 2:1, 2.5:1, 3:1
255 CBGA
0.29
5LM CMOS
3.3V i/o, 2.6V internal
12.0 @ 266 MHz
7.4 @ 266 MHz
488 MIPS @ 266 MHz
Integer, Floating-Point, Branch,
Load/Store, System Register
x3, x3.5, x4, x4.5, x5, x5.5,
x6, x6.5, x7, x7.5, x8
PowerPC 750
200-266 MHz
1ATX35906-6 Printed in USA 5/00 Hibbert LITRISC
Contact Information
I
Motorola offers user’s manuals,
application notes and sample
code for all of its processors.
In addition, local support for these
products is also provided.
This information can be found at:
http://motorola.com/PowerPC/
I
For all other inquiries about Motorola
products, please contact the Motorola
Customer Response Center at:
Phone: 800-521-6274 or
http://motorola.com/semiconductors
PowerPC 750/740 CPU Summary
2000 Motorola, Inc. All rights reserved. Printed in the U.S.A. Motorola and the
are registered trademarks of Motorola, Inc. PowerPC, the PowerPC logo, PowerPC 603e, PowerPC 740 and PowerPC 750 are trademarks of International
Business Machines Corporation and used under license therefrom. This document contains information on a new product under development. Specifications and information herein are subject to change without notice.