參數(shù)資料
型號: MPC974FAR2
廠商: MOTOROLA INC
元件分類: 時鐘及定時
英文描述: 974 SERIES, PLL BASED CLOCK DRIVER, 14 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
封裝: LQFP-52
文件頁數(shù): 5/6頁
文件大?。?/td> 118K
代理商: MPC974FAR2
MPC974
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
214
Figure 3. MPC974 Programming Schemes
TCLK
FB_In
Qa
Qb
Qc
QFB
5
4
66MHz
33MHz
fsela
0
fselb
0
fselc
0
fselFB
00
VCO_Sel
0
TCLK
FB_In
Qa
Qb
Qc
QFB
5
4
100MHz
50MHz
33MHz
fsela
0
fselb
1
fselc
1
fselFB
10
VCO_Sel
0
TCLK
FB_In
Qa
Qb
Qc
QFB
5
4
100MHz
50MHz
33MHz
25MHz
fsela
0
fselb
1
fselc
1
fselFB
01
VCO_Sel
0
TCLK
FB_In
Qa
Qb
Qc
QFB
5
4
50MHz
fsela
1
fselb
1
fselc
0
fselFB
00
VCO_Sel
0
Power Supply Filtering
The MPC974 is a mixed analog/digital product and exhibits
some sensitivities that would not necessarily be seen on a fully
digital product. Analog circuitry is naturally susceptible to ran-
dom noise, especially if this noise is seen on the power supply
pins. The MPC974 provides separate power supplies for the
output buffers (VCCO) and the internal PLL (VCCA) of the de-
vice. The purpose of this design technique is to try and isolate
the high switching noise digital outputs from the relatively sen-
sitive internal analog phase–locked loop. In a controlled envi-
ronment such as an evaluation board this level of isolation is
sufficient. However, in a digital system environment where it is
more difficult to minimize noise on the power supplies a sec-
ond level of isolation may be required. The simplest form of
isolation is a power supply filter on the VCCA pin for the
MPC974.
Figure 4. Power Supply Filter
VCCA
VCC
MPC974
0.01F
22F
0.01F
3.3V
RS=5-15
Figure 4 illustrates a typical power supply filter scheme. The
MPC974 is most susceptible to noise with spectral content in
the 1KHz to 1MHz range. Therefore the filter should be de-
signed to target this range. The key parameter that needs to be
met in the final filter design is the DC voltage drop that will be
seen between the VCC supply and the VCCA pin of the
MPC974. From the data sheet the IVCCA current (the current
sourced through the VCCA pin) is typically 15mA (20mA maxi-
mum), assuming that a minimum of 3.0V must be maintained
on the VCCA pin very little DC voltage drop can be tolerated
when a 3.3V VCC supply is used. The resistor shown in
Figure 4 must have a resistance of 10–15
to meet the voltage
drop criteria. The RC filter pictured will provide a broadband
filter with approximately 100:1 attenuation for noise whose
spectral content is above 20KHz. As the noise frequency
crosses the series resonant point of an individual capacitor it’s
overall impedance begins to look inductive and thus increases
with increasing frequency. The parallel capacitor combination
shown ensures that a low impedance path to ground exists for
frequencies well above the bandwidth of the PLL.
Although the MPC974 has several design features to mini-
mize the susceptibility to power supply noise (isolated power
and grounds and fully differential PLL) there still may be ap-
plications in which overall performance is being degraded due
to system power supply noise. The power supply filter
schemes discussed in this section should be adequate to elim-
inate power supply noise related problems in most designs.
2
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